I was wondering if it would be f erasable to continue reading and processing new
circuits and carry out simulations after .end statement. This is convenient if there are multiple simulations which need to be carried out one after the other. Xyce can exit upon EOF. This will reduce loading time of Xyce, reduce the circuit complexity, smaller matrices.
Overall, it improves performance.
*header c1
....
.end
*header c2
..
.end
If one can divert the output of each job to a file, than Xyce could be used as a simulation server which never exits. Some simulators call this interactive mode with a
few simple commands:
read c1.sp > c1. out
run
read c2.sp > c2.out
run