[PATCH 1/1] RISC-V: Add sbss section in linker script

[Tan En De]

Besides bss section, sbss section also needs to be zeroed out during startup.

Signed-off-by: Tan En De <ende...@starfivetech.com>
---
arch/riscv/cpu/generic/linker.ld | 2 ++
1 file changed, 2 insertions(+)

diff --git a/arch/riscv/cpu/generic/linker.ld b/arch/riscv/cpu/generic/linker.ld
index 47a493f4..6652a6ae 100755
--- a/arch/riscv/cpu/generic/linker.ld
+++ b/arch/riscv/cpu/generic/linker.ld
@@ -156,6 +156,8 @@ SECTIONS
PROVIDE(_bss_start = .);
*(.bss)
*(.bss.*)
+ *(.sbss)
+ *(.sbss.*)
. = ALIGN(8);
PROVIDE(_bss_end = .);
}
--
2.34.1

[Anup Patel]

On Mon, Dec 18, 2023 at 9:26 PM Tan En De <ende...@gmail.com> wrote:
>
> Besides bss section, sbss section also needs to be zeroed out during startup.
>
> Signed-off-by: Tan En De <ende...@starfivetech.com>

LGTM.

Reviewed-by: Anup Patel <an...@brainfault.org>

Applied this patch to the xvisor-next tree.

Thanks,
Anup

> ---
> arch/riscv/cpu/generic/linker.ld | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/riscv/cpu/generic/linker.ld b/arch/riscv/cpu/generic/linker.ld
> index 47a493f4..6652a6ae 100755
> --- a/arch/riscv/cpu/generic/linker.ld
> +++ b/arch/riscv/cpu/generic/linker.ld
> @@ -156,6 +156,8 @@ SECTIONS
> PROVIDE(_bss_start = .);
> *(.bss)
> *(.bss.*)
> + *(.sbss)
> + *(.sbss.*)
> . = ALIGN(8);
> PROVIDE(_bss_end = .);
> }
> --
> 2.34.1
>

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