[PATCH 1/5] RISC-V: Cosmentic changes in arch specific macros

[Anup Patel]

This patch does minor cosmetic changes arch specific VCPU and
Guest related macros.

Signed-off-by: Anup Patel <an...@brainfault.org>
---
arch/riscv/cpu/generic/include/arch_regs.h | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/cpu/generic/include/arch_regs.h b/arch/riscv/cpu/generic/include/arch_regs.h
index 615d4a78..534a161f 100644
--- a/arch/riscv/cpu/generic/include/arch_regs.h
+++ b/arch/riscv/cpu/generic/include/arch_regs.h
@@ -186,10 +186,11 @@ struct riscv_guest_priv {
void *guest_serial;
};

-#define riscv_timer_priv(vcpu) (riscv_priv(vcpu)->timer_priv)
-#define riscv_regs(vcpu) (&((vcpu)->regs))
-#define riscv_priv(vcpu) ((struct riscv_priv *)((vcpu)->arch_priv))
-#define riscv_guest_priv(guest) ((struct riscv_guest_priv *)((guest)->arch_priv))
+#define riscv_regs(vcpu) (&((vcpu)->regs))
+#define riscv_priv(vcpu) ((struct riscv_priv *)((vcpu)->arch_priv))
+#define riscv_fp_priv(vcpu) (&riscv_priv(vcpu)->fp)
+#define riscv_timer_priv(vcpu) (riscv_priv(vcpu)->timer_priv)
+#define riscv_guest_priv(guest) ((struct riscv_guest_priv *)((guest)->arch_priv))
#define riscv_guest_serial(guest) (riscv_guest_priv(guest)->guest_serial)

#endif
--
2.25.1

[Anup Patel]

We don't need to do complex math for calculating Guest time_delta
value instead we can simply use -guest_cycles64() directly as the
Guest time_delta (just like KVM RISC-V).

Signed-off-by: Anup Patel <an...@brainfault.org>
---

arch/riscv/cpu/generic/cpu_vcpu_helper.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/cpu/generic/cpu_vcpu_helper.c b/arch/riscv/cpu/generic/cpu_vcpu_helper.c
index ccfdaffc..37cf27f3 100644
--- a/arch/riscv/cpu/generic/cpu_vcpu_helper.c
+++ b/arch/riscv/cpu/generic/cpu_vcpu_helper.c
@@ -33,7 +33,6 @@
#include <arch_guest.h>
#include <arch_vcpu.h>
#include <vio/vmm_vserial.h>
-#include <libs/mathlib.h>
#include <generic_mmu.h>

#include <cpu_hwcap.h>
@@ -45,6 +44,7 @@
#include <cpu_guest_serial.h>
#include <riscv_csr.h>
#include <riscv_lrsc.h>
+#include <riscv_timex.h>

#define RISCV_ISA_ALLOWED (riscv_isa_extension_mask(a) | \
riscv_isa_extension_mask(c) | \
@@ -115,9 +115,7 @@ int arch_guest_init(struct vmm_guest *guest)
}
priv = riscv_guest_priv(guest);

- priv->time_delta = vmm_manager_guest_reset_timestamp(guest);
- priv->time_delta *= vmm_timer_clocksource_frequency();
- priv->time_delta = -udiv64(priv->time_delta, 1000000000ULL);
+ priv->time_delta = -get_cycles64();

priv->pgtbl = mmu_pgtbl_alloc(MMU_STAGE2, -1);
if (!priv->pgtbl) {
--
2.25.1

[Anup Patel]

The monitor sub-command of vcpu command only has one optional
parameter so fix sub-command list entry accordingly.

Signed-off-by: Anup Patel <an...@brainfault.org>
---

commands/cmd_vcpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/commands/cmd_vcpu.c b/commands/cmd_vcpu.c
index 4799347b..8a015e6c 100644
--- a/commands/cmd_vcpu.c
+++ b/commands/cmd_vcpu.c
@@ -639,7 +639,7 @@ static const struct {
{"list", cmd_vcpu_list, 0},
{"orphan_list", cmd_vcpu_orphan_list, 0},
{"normal_list", cmd_vcpu_normal_list, 0},
- {"monitor", cmd_vcpu_monitor, 1},
+ {"monitor", cmd_vcpu_monitor, 0},
{"reset", cmd_vcpu_reset, 1},
{"kick", cmd_vcpu_kick, 1},
{"pause", cmd_vcpu_pause, 1},
--
2.25.1

[Anup Patel]

We don't need to pack essential structs in arch_regs.h because GCC
ensures that member offsets match the member data type irrespective
to the target system (RV32 or RV64). This also allows GCC to generate
more optimized instruction sequence when accessing members of these
essential structs.

Signed-off-by: Anup Patel <an...@brainfault.org>
---

arch/riscv/cpu/generic/include/arch_regs.h | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/riscv/cpu/generic/include/arch_regs.h b/arch/riscv/cpu/generic/include/arch_regs.h
index 534a161f..81fb53fb 100644
--- a/arch/riscv/cpu/generic/include/arch_regs.h
+++ b/arch/riscv/cpu/generic/include/arch_regs.h
@@ -52,12 +52,12 @@
#define RISCV_PRIV_FP_F_F24 _AC(0x060, UL)
#define RISCV_PRIV_FP_F_F25 _AC(0x064, UL)
#define RISCV_PRIV_FP_F_F26 _AC(0x068, UL)
-#define RISCV_PRIV_FP_F_F27 _AC(0x070, UL)
-#define RISCV_PRIV_FP_F_F28 _AC(0x074, UL)
-#define RISCV_PRIV_FP_F_F29 _AC(0x078, UL)
-#define RISCV_PRIV_FP_F_F30 _AC(0x07c, UL)
-#define RISCV_PRIV_FP_F_F31 _AC(0x080, UL)
-#define RISCV_PRIV_FP_F_FCSR _AC(0x084, UL)
+#define RISCV_PRIV_FP_F_F27 _AC(0x06c, UL)
+#define RISCV_PRIV_FP_F_F28 _AC(0x070, UL)
+#define RISCV_PRIV_FP_F_F29 _AC(0x074, UL)
+#define RISCV_PRIV_FP_F_F30 _AC(0x078, UL)
+#define RISCV_PRIV_FP_F_F31 _AC(0x07c, UL)
+#define RISCV_PRIV_FP_F_FCSR _AC(0x080, UL)

#define RISCV_PRIV_FP_D_F0 _AC(0x000, UL)
#define RISCV_PRIV_FP_D_F1 _AC(0x008, UL)
@@ -135,19 +135,19 @@ struct arch_regs {
unsigned long sstatus;
unsigned long hstatus;
unsigned long sp_exec;
-} __packed;
+};

typedef struct arch_regs arch_regs_t;

struct riscv_priv_fp_f {
u32 f[32];
u32 fcsr;
-} __packed;
+};

struct riscv_priv_fp_d {
u64 f[32];
u32 fcsr;
-} __packed;
+};

union riscv_priv_fp {
struct riscv_priv_fp_f f;
--
2.25.1

[Anup Patel]

We don't need the TIMER_EVENT_THRESHOLD_NS define because it is
redundant and Guest Linux generally programs far events above
threshold.

Signed-off-by: Anup Patel <an...@brainfault.org>
---

arch/riscv/cpu/generic/cpu_vcpu_timer.c | 14 ++++----------
1 file changed, 4 insertions(+), 10 deletions(-)

diff --git a/arch/riscv/cpu/generic/cpu_vcpu_timer.c b/arch/riscv/cpu/generic/cpu_vcpu_timer.c
index ffaffac3..cc15ef9b 100644
--- a/arch/riscv/cpu/generic/cpu_vcpu_timer.c
+++ b/arch/riscv/cpu/generic/cpu_vcpu_timer.c
@@ -30,8 +30,6 @@

#include <riscv_encoding.h>

-#define TIMER_EVENT_THRESHOLD_NS 1000
-
static void riscv_timer_event_expired(struct vmm_timer_event *ev)
{
struct vmm_vcpu *vcpu = ev->priv;
@@ -52,20 +50,16 @@ void riscv_timer_event_start(struct vmm_vcpu *vcpu, u64 next_cycle)
return;
}

- next_cycle -= riscv_guest_priv(vcpu->guest)->time_delta;
- delta_ns = vmm_timer_delta_cycles_to_ns(next_cycle);
-
/*
* In RISC-V, we should clear the timer pending bit before
* programming next one.
*/
vmm_vcpu_irq_clear(vcpu, IRQ_VS_TIMER);

- /* No point in programming a timer for 1us */
- if (delta_ns <= TIMER_EVENT_THRESHOLD_NS)
- vmm_vcpu_irq_assert(vcpu, IRQ_VS_TIMER, 0x0);
- else
- vmm_timer_event_start(&tevent->time_ev, delta_ns);
+ /* Start the timer event */
+ next_cycle -= riscv_guest_priv(vcpu->guest)->time_delta;
+ delta_ns = vmm_timer_delta_cycles_to_ns(next_cycle);
+ vmm_timer_event_start(&tevent->time_ev, delta_ns);
}

int riscv_timer_event_init(struct vmm_vcpu *vcpu, void **timer_event)
--
2.25.1

[Anup Patel]

Applied this patch to the xvisor-next repo

Regards,
Anup

[Anup Patel]

[Anup Patel]

[Anup Patel]

[Anup Patel]