[PATCH 1/4] x86: Fixed problem with default terminal

6 views
Skip to first unread message

hcha...@xvisor-x86.org

unread,
Mar 16, 2021, 12:25:55 AM3/16/21
to xvisor...@googlegroups.com, Himanshu Chauhan
From: Himanshu Chauhan <hcha...@xvisor-x86.org>

Even with passing console=serial@0,115200,24000000 as the
argument to xvisor, the console was always defaulting to VGA.

This patch fixes that problem.

Signed-off-by: Himanshu Chauhan <hcha...@xvisor-x86.org>
---
arch/x86/board/x86_64_generic/brd_defterm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/board/x86_64_generic/brd_defterm.c b/arch/x86/board/x86_64_generic/brd_defterm.c
index 1c6bb80b..76e511fb 100644
--- a/arch/x86/board/x86_64_generic/brd_defterm.c
+++ b/arch/x86/board/x86_64_generic/brd_defterm.c
@@ -111,7 +111,7 @@ int __init arch_defterm_init(void)
goto out;
}

- if (!strcmp(cmdline_console_string, "serial")) {
+ if (strcmp(cmdline_console_string, "serial") >= 0) {
vmm_printf("%s: Serial as console\n", __func__);
ops = get_serial_defterm_ops((char *)&cmdline_console_string[0]);
goto out;
--
2.27.0

hcha...@xvisor-x86.org

unread,
Mar 16, 2021, 12:25:56 AM3/16/21
to xvisor...@googlegroups.com, Himanshu Chauhan
From: Himanshu Chauhan <hcha...@xvisor-x86.org>

The minimum NS value was too low to handle default
timers correctly. The timers used to miss fire as a
result of which the system used to hang once in a while.

Also, the max NS is now calculated based on max u32 value
instead of u64 as the count register is 32-bits.

Signed-off-by: Himanshu Chauhan <hcha...@xvisor-x86.org>
---
arch/x86/cpu/common/cpu_apic.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/cpu/common/cpu_apic.c b/arch/x86/cpu/common/cpu_apic.c
index 4dbaf0f4..41d357d8 100644
--- a/arch/x86/cpu/common/cpu_apic.c
+++ b/arch/x86/cpu/common/cpu_apic.c
@@ -651,9 +651,9 @@ int __cpuinit lapic_clockchip_init(void)
NSEC_PER_SEC,
(lapic_sys_timer.freq_khz*1000),
5);
- lapic_sys_timer.clkchip.min_delta_ns = 100000;
+ lapic_sys_timer.clkchip.min_delta_ns = 10000000;
lapic_sys_timer.clkchip.max_delta_ns =
- vmm_clockchip_delta2ns(0x7FFFFFFFFFFFFFFULL,
+ vmm_clockchip_delta2ns(0x7FFFFFFFUL,
&lapic_sys_timer.clkchip);

vmm_printf("%s: LAPIC Freq: %ukhz Max Delta NS: %lu\n",
--
2.27.0

hcha...@xvisor-x86.org

unread,
Mar 16, 2021, 12:25:58 AM3/16/21
to xvisor...@googlegroups.com, Himanshu Chauhan
From: Himanshu Chauhan <hcha...@xvisor-x86.org>

Signed-off-by: Himanshu Chauhan <hcha...@xvisor-x86.org>
---
arch/x86/cpu/common/cpu_features.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/arch/x86/cpu/common/cpu_features.c b/arch/x86/cpu/common/cpu_features.c
index 18cb98f0..53cff3ba 100644
--- a/arch/x86/cpu/common/cpu_features.c
+++ b/arch/x86/cpu/common/cpu_features.c
@@ -121,11 +121,13 @@ static inline void gather_amd_features(struct cpuinfo_x86 *cpu_info)
cpu_info->hw_virt_available = ((c >> 2) & 1);

if (cpu_info->hw_virt_available) {
- /* Check if nested paging is also available. */
- cpuid(AMD_CPUID_EXTENDED_SVM_IDENTIFIER, &a, &b, &c, &d);
- cpu_info->hw_nested_paging = (d & 0x1UL);
- cpu_info->hw_nr_asids = b;
- cpu_info->decode_assist = ((d >> 7) & 0x1);
+ if (cpu_info->vendor == x86_VENDOR_AMD) {
+ /* Check if nested paging is also available. */
+ cpuid(AMD_CPUID_EXTENDED_SVM_IDENTIFIER, &a, &b, &c, &d);
+ cpu_info->hw_nested_paging = (d & 0x1UL);
+ cpu_info->hw_nr_asids = b;
+ cpu_info->decode_assist = ((d >> 7) & 0x1);
+ }
}
}

--
2.27.0

hcha...@xvisor-x86.org

unread,
Mar 16, 2021, 12:25:59 AM3/16/21
to xvisor...@googlegroups.com, Himanshu Chauhan
From: Himanshu Chauhan <hcha...@xvisor-x86.org>

When the processor exits to root-mode the interrupts are
disabled. Enable them as soon as the context is restored.

Signed-off-by: Himanshu Chauhan <hcha...@xvisor-x86.org>
---
arch/x86/cpu/common/vm/vtx/vmx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/cpu/common/vm/vtx/vmx.c b/arch/x86/cpu/common/vm/vtx/vmx.c
index b735c1d4..a601b70f 100644
--- a/arch/x86/cpu/common/vm/vtx/vmx.c
+++ b/arch/x86/cpu/common/vm/vtx/vmx.c
@@ -364,7 +364,7 @@ static int __vmcs_run(struct vcpu_hw_context *context, bool resume)
"popq %%rbp\n\t"
"popfq\n\t"
"sub $2, %0\n\t" /* -2 invalid failure */
- "7:nop\n\t"
+ "7:sti\n\t"
:"=q"(rc)
:[resume]"m"(resume), "d"((unsigned long)HOST_RSP),
[context]"c"(context), "b"((unsigned long)HOST_RIP),
--
2.27.0

Anup Patel

unread,
Mar 16, 2021, 1:11:30 AM3/16/21
to Xvisor Devel, Himanshu Chauhan
On Tue, Mar 16, 2021 at 9:55 AM <hcha...@xvisor-x86.org> wrote:
>
> From: Himanshu Chauhan <hcha...@xvisor-x86.org>
>
> Even with passing console=serial@0,115200,24000000 as the
> argument to xvisor, the console was always defaulting to VGA.
>
> This patch fixes that problem.
>
> Signed-off-by: Himanshu Chauhan <hcha...@xvisor-x86.org>

Looks good to me.

Reviewed-by: Anup Patel <an...@brainfault.org>

Regards,
Anup

> ---
> arch/x86/board/x86_64_generic/brd_defterm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/board/x86_64_generic/brd_defterm.c b/arch/x86/board/x86_64_generic/brd_defterm.c
> index 1c6bb80b..76e511fb 100644
> --- a/arch/x86/board/x86_64_generic/brd_defterm.c
> +++ b/arch/x86/board/x86_64_generic/brd_defterm.c
> @@ -111,7 +111,7 @@ int __init arch_defterm_init(void)
> goto out;
> }
>
> - if (!strcmp(cmdline_console_string, "serial")) {
> + if (strcmp(cmdline_console_string, "serial") >= 0) {
> vmm_printf("%s: Serial as console\n", __func__);
> ops = get_serial_defterm_ops((char *)&cmdline_console_string[0]);
> goto out;
> --
> 2.27.0
>
> --
> You received this message because you are subscribed to the Google Groups "Xvisor Development" group.
> To unsubscribe from this group and stop receiving emails from it, send an email to xvisor-devel...@googlegroups.com.
> To view this discussion on the web visit https://groups.google.com/d/msgid/xvisor-devel/20210316042540.12922-1-hchauhan%40xvisor-x86.org.

Anup Patel

unread,
Mar 16, 2021, 1:12:14 AM3/16/21
to Xvisor Devel, Himanshu Chauhan
On Tue, Mar 16, 2021 at 9:55 AM <hcha...@xvisor-x86.org> wrote:
>
> From: Himanshu Chauhan <hcha...@xvisor-x86.org>
>
> The minimum NS value was too low to handle default
> timers correctly. The timers used to miss fire as a
> result of which the system used to hang once in a while.
>
> Also, the max NS is now calculated based on max u32 value
> instead of u64 as the count register is 32-bits.
>
> Signed-off-by: Himanshu Chauhan <hcha...@xvisor-x86.org>

Looks good to me.

Reviewed-by: Anup Patel <an...@brainfault.org>

Regards,
Anup

> ---
> arch/x86/cpu/common/cpu_apic.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/cpu/common/cpu_apic.c b/arch/x86/cpu/common/cpu_apic.c
> index 4dbaf0f4..41d357d8 100644
> --- a/arch/x86/cpu/common/cpu_apic.c
> +++ b/arch/x86/cpu/common/cpu_apic.c
> @@ -651,9 +651,9 @@ int __cpuinit lapic_clockchip_init(void)
> NSEC_PER_SEC,
> (lapic_sys_timer.freq_khz*1000),
> 5);
> - lapic_sys_timer.clkchip.min_delta_ns = 100000;
> + lapic_sys_timer.clkchip.min_delta_ns = 10000000;
> lapic_sys_timer.clkchip.max_delta_ns =
> - vmm_clockchip_delta2ns(0x7FFFFFFFFFFFFFFULL,
> + vmm_clockchip_delta2ns(0x7FFFFFFFUL,
> &lapic_sys_timer.clkchip);
>
> vmm_printf("%s: LAPIC Freq: %ukhz Max Delta NS: %lu\n",
> --
> 2.27.0
>
> --
> You received this message because you are subscribed to the Google Groups "Xvisor Development" group.
> To unsubscribe from this group and stop receiving emails from it, send an email to xvisor-devel...@googlegroups.com.
> To view this discussion on the web visit https://groups.google.com/d/msgid/xvisor-devel/20210316042540.12922-2-hchauhan%40xvisor-x86.org.

Anup Patel

unread,
Mar 16, 2021, 1:12:36 AM3/16/21
to Xvisor Devel, Himanshu Chauhan
On Tue, Mar 16, 2021 at 9:55 AM <hcha...@xvisor-x86.org> wrote:
>
> From: Himanshu Chauhan <hcha...@xvisor-x86.org>
>
> Signed-off-by: Himanshu Chauhan <hcha...@xvisor-x86.org>

Looks good to me.

Reviewed-by: Anup Patel <an...@brainfault.org>

Regards,
Anup

> --
> You received this message because you are subscribed to the Google Groups "Xvisor Development" group.
> To unsubscribe from this group and stop receiving emails from it, send an email to xvisor-devel...@googlegroups.com.
> To view this discussion on the web visit https://groups.google.com/d/msgid/xvisor-devel/20210316042540.12922-3-hchauhan%40xvisor-x86.org.

Anup Patel

unread,
Mar 16, 2021, 1:13:00 AM3/16/21
to Xvisor Devel, Himanshu Chauhan
On Tue, Mar 16, 2021 at 9:56 AM <hcha...@xvisor-x86.org> wrote:
>
> From: Himanshu Chauhan <hcha...@xvisor-x86.org>
>
> When the processor exits to root-mode the interrupts are
> disabled. Enable them as soon as the context is restored.
>
> Signed-off-by: Himanshu Chauhan <hcha...@xvisor-x86.org>

Looks good to me.

Reviewed-by: Anup Patel <an...@brainfault.org>

Regards,
Anup

> ---
> arch/x86/cpu/common/vm/vtx/vmx.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/cpu/common/vm/vtx/vmx.c b/arch/x86/cpu/common/vm/vtx/vmx.c
> index b735c1d4..a601b70f 100644
> --- a/arch/x86/cpu/common/vm/vtx/vmx.c
> +++ b/arch/x86/cpu/common/vm/vtx/vmx.c
> @@ -364,7 +364,7 @@ static int __vmcs_run(struct vcpu_hw_context *context, bool resume)
> "popq %%rbp\n\t"
> "popfq\n\t"
> "sub $2, %0\n\t" /* -2 invalid failure */
> - "7:nop\n\t"
> + "7:sti\n\t"
> :"=q"(rc)
> :[resume]"m"(resume), "d"((unsigned long)HOST_RSP),
> [context]"c"(context), "b"((unsigned long)HOST_RIP),
> --
> 2.27.0
>
> --
> You received this message because you are subscribed to the Google Groups "Xvisor Development" group.
> To unsubscribe from this group and stop receiving emails from it, send an email to xvisor-devel...@googlegroups.com.
> To view this discussion on the web visit https://groups.google.com/d/msgid/xvisor-devel/20210316042540.12922-4-hchauhan%40xvisor-x86.org.
Reply all
Reply to author
Forward
0 new messages