[PATCH 1/4] RISC-V: Add SBI SRST extension defines

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Anup Patel

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Dec 2, 2020, 11:24:15 AM12/2/20
to xvisor...@googlegroups.com, Anup Patel
This patch adds SBI SRST extension defines and sync-up with
OpenSBI sbi_ecall_interface.h header.

Signed-off-by: Anup Patel <an...@brainfault.org>
---
arch/riscv/cpu/generic/include/riscv_sbi.h | 39 ++++++++++++++--------
1 file changed, 26 insertions(+), 13 deletions(-)

diff --git a/arch/riscv/cpu/generic/include/riscv_sbi.h b/arch/riscv/cpu/generic/include/riscv_sbi.h
index afc72df1..7dca352a 100644
--- a/arch/riscv/cpu/generic/include/riscv_sbi.h
+++ b/arch/riscv/cpu/generic/include/riscv_sbi.h
@@ -27,7 +27,7 @@
#include <vmm_const.h>

/* SBI Extension IDs */
-#define SBI_EXT_0_1_SET_TIMER 0x0
+#define SBI_EXT_0_1_SET_TIMER 0x0
#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1
#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2
#define SBI_EXT_0_1_CLEAR_IPI 0x3
@@ -41,19 +41,16 @@
#define SBI_EXT_IPI 0x735049
#define SBI_EXT_RFENCE 0x52464E43
#define SBI_EXT_HSM 0x48534D
+#define SBI_EXT_SRST 0x53525354

/* SBI function IDs for BASE extension */
#define SBI_EXT_BASE_GET_SPEC_VERSION 0x0
#define SBI_EXT_BASE_GET_IMP_ID 0x1
-#define SBI_EXT_BASE_GET_IMP_VERSION 0x2
-#define SBI_EXT_BASE_PROBE_EXT 0x3
-#define SBI_EXT_BASE_GET_MVENDORID 0x4
-#define SBI_EXT_BASE_GET_MARCHID 0x5
-#define SBI_EXT_BASE_GET_MIMPID 0x6
-
-#define SBI_SPEC_VERSION_MAJOR_SHIFT 24
-#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
-#define SBI_SPEC_VERSION_MINOR_MASK 0xffffff
+#define SBI_EXT_BASE_GET_IMP_VERSION 0x2
+#define SBI_EXT_BASE_PROBE_EXT 0x3
+#define SBI_EXT_BASE_GET_MVENDORID 0x4
+#define SBI_EXT_BASE_GET_MARCHID 0x5
+#define SBI_EXT_BASE_GET_MIMPID 0x6

/* SBI function IDs for TIME extension */
#define SBI_EXT_TIME_SET_TIMER 0x0
@@ -62,7 +59,7 @@
#define SBI_EXT_IPI_SEND_IPI 0x0

/* SBI function IDs for RFENCE extension */
-#define SBI_EXT_RFENCE_REMOTE_FENCE_I 0x0
+#define SBI_EXT_RFENCE_REMOTE_FENCE_I 0x0
#define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA 0x1
#define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID 0x2
#define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA 0x3
@@ -77,11 +74,27 @@

#define SBI_HSM_HART_STATUS_STARTED 0x0
#define SBI_HSM_HART_STATUS_STOPPED 0x1
-#define SBI_HSM_HART_STATUS_START_PENDING 0x2
-#define SBI_HSM_HART_STATUS_STOP_PENDING 0x3
+#define SBI_HSM_HART_STATUS_START_PENDING 0x2
+#define SBI_HSM_HART_STATUS_STOP_PENDING 0x3
+
+/* SBI function IDs for SRST extension */
+#define SBI_EXT_SRST_RESET 0x0

+#define SBI_SRST_RESET_TYPE_SHUTDOWN 0x0
+#define SBI_SRST_RESET_TYPE_COLD_REBOOT 0x1
+#define SBI_SRST_RESET_TYPE_WARM_REBOOT 0x2
+#define SBI_SRST_RESET_TYPE_LAST SBI_SRST_RESET_TYPE_WARM_REBOOT
+
+#define SBI_SRST_RESET_REASON_NONE 0x0
+#define SBI_SRST_RESET_REASON_SYSFAIL 0x1
+
+#define SBI_SPEC_VERSION_MAJOR_SHIFT 24
+#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
+#define SBI_SPEC_VERSION_MINOR_MASK 0xffffff
#define SBI_EXT_VENDOR_START 0x09000000
#define SBI_EXT_VENDOR_END 0x09FFFFFF
+#define SBI_EXT_FIRMWARE_START 0x0A000000
+#define SBI_EXT_FIRMWARE_END 0x0AFFFFFF

/* SBI return error codes */
#define SBI_SUCCESS 0
--
2.25.1

Anup Patel

unread,
Dec 2, 2020, 11:24:17 AM12/2/20
to xvisor...@googlegroups.com, Anup Patel
We should detect and use SBI SRST extension when available from
underlying M-mode runtime firmware.

Signed-off-by: Anup Patel <an...@brainfault.org>
---
arch/riscv/cpu/generic/cpu_sbi.c | 32 +++++++++++++++++++++++++++++++-
1 file changed, 31 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/cpu/generic/cpu_sbi.c b/arch/riscv/cpu/generic/cpu_sbi.c
index f4e7f0f1..f00167e8 100644
--- a/arch/riscv/cpu/generic/cpu_sbi.c
+++ b/arch/riscv/cpu/generic/cpu_sbi.c
@@ -480,6 +480,30 @@ static struct defterm_ops sbi_defterm_ops = {
.init = sbi_defterm_init,
};

+static void __sbi_srst_reset(unsigned long type, unsigned long reason)
+{
+ sbi_ecall(SBI_EXT_SRST, SBI_EXT_SRST_RESET, type, reason,
+ 0, 0, 0, 0);
+ vmm_printf("%s: type=0x%lx reason=0x%lx failed\n",
+ __func__, type, reason);
+}
+
+static int sbi_srst_shutdown(void)
+{
+ __sbi_srst_reset(SBI_SRST_RESET_TYPE_SHUTDOWN,
+ SBI_SRST_RESET_REASON_NONE);
+
+ return 0;
+}
+
+static int sbi_srst_reset(void)
+{
+ __sbi_srst_reset(SBI_SRST_RESET_TYPE_COLD_REBOOT,
+ SBI_SRST_RESET_REASON_NONE);
+
+ return 0;
+}
+
int __init sbi_init(void)
{
int ret;
@@ -506,13 +530,19 @@ int __init sbi_init(void)
__sbi_rfence = __sbi_rfence_v02;
vmm_init_printf("SBI v0.2 RFENCE extension detected\n");
}
+ if (sbi_probe_extension(SBI_EXT_SRST) > 0) {
+ vmm_register_system_shutdown(sbi_srst_shutdown);
+ vmm_register_system_reset(sbi_srst_reset);
+ vmm_init_printf("SBI v0.2 SRST extension detected\n");
+ }
+ } else {
+ vmm_register_system_shutdown(sbi_shutdown);
}

if (!sbi_has_0_2_rfence()) {
vmm_init_printf("WARNING: SBI v0.2 RFENCE not available !\n");
}

- vmm_register_system_shutdown(sbi_shutdown);
defterm_set_initial_ops(&sbi_defterm_ops);

return 0;
--
2.25.1

Anup Patel

unread,
Dec 2, 2020, 11:24:19 AM12/2/20
to xvisor...@googlegroups.com, Anup Patel
We should print detected SBI spec version only once instead of
printing in all prints of sbi_init().

Signed-off-by: Anup Patel <an...@brainfault.org>
---
arch/riscv/cpu/generic/cpu_sbi.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/riscv/cpu/generic/cpu_sbi.c b/arch/riscv/cpu/generic/cpu_sbi.c
index f00167e8..12ff28bd 100644
--- a/arch/riscv/cpu/generic/cpu_sbi.c
+++ b/arch/riscv/cpu/generic/cpu_sbi.c
@@ -520,27 +520,27 @@ int __init sbi_init(void)
sbi_get_firmware_id(), sbi_get_firmware_version());
if (sbi_probe_extension(SBI_EXT_TIME) > 0) {
__sbi_set_timer = __sbi_set_timer_v02;
- vmm_init_printf("SBI v0.2 TIME extension detected\n");
+ vmm_init_printf("SBI TIME extension detected\n");
}
if (sbi_probe_extension(SBI_EXT_IPI) > 0) {
__sbi_send_ipi = __sbi_send_ipi_v02;
- vmm_init_printf("SBI v0.2 IPI extension detected\n");
+ vmm_init_printf("SBI IPI extension detected\n");
}
if (sbi_probe_extension(SBI_EXT_RFENCE) > 0) {
__sbi_rfence = __sbi_rfence_v02;
- vmm_init_printf("SBI v0.2 RFENCE extension detected\n");
+ vmm_init_printf("SBI RFENCE extension detected\n");
}
if (sbi_probe_extension(SBI_EXT_SRST) > 0) {
vmm_register_system_shutdown(sbi_srst_shutdown);
vmm_register_system_reset(sbi_srst_reset);
- vmm_init_printf("SBI v0.2 SRST extension detected\n");
+ vmm_init_printf("SBI SRST extension detected\n");
}
} else {
vmm_register_system_shutdown(sbi_shutdown);
}

if (!sbi_has_0_2_rfence()) {
- vmm_init_printf("WARNING: SBI v0.2 RFENCE not available !\n");
+ vmm_init_printf("WARNING: SBI RFENCE not available !\n");
}

defterm_set_initial_ops(&sbi_defterm_ops);
--
2.25.1

Anup Patel

unread,
Dec 2, 2020, 11:24:21 AM12/2/20
to xvisor...@googlegroups.com, Anup Patel
We provide SBI SRST extension to Guest/VM so that Guest OS can
reboot itself.

Signed-off-by: Anup Patel <an...@brainfault.org>
---
arch/riscv/cpu/generic/cpu_vcpu_sbi.c | 2 +
arch/riscv/cpu/generic/cpu_vcpu_sbi_replace.c | 47 +++++++++++++++++++
2 files changed, 49 insertions(+)

diff --git a/arch/riscv/cpu/generic/cpu_vcpu_sbi.c b/arch/riscv/cpu/generic/cpu_vcpu_sbi.c
index bcc6cd99..60b01d0b 100644
--- a/arch/riscv/cpu/generic/cpu_vcpu_sbi.c
+++ b/arch/riscv/cpu/generic/cpu_vcpu_sbi.c
@@ -33,6 +33,7 @@ extern const struct cpu_vcpu_sbi_extension vcpu_sbi_rfence;
extern const struct cpu_vcpu_sbi_extension vcpu_sbi_ipi;
extern const struct cpu_vcpu_sbi_extension vcpu_sbi_base;
extern const struct cpu_vcpu_sbi_extension vcpu_sbi_hsm;
+extern const struct cpu_vcpu_sbi_extension vcpu_sbi_srst;
extern const struct cpu_vcpu_sbi_extension vcpu_sbi_legacy;

static const struct cpu_vcpu_sbi_extension *vcpu_sbi[] = {
@@ -41,6 +42,7 @@ static const struct cpu_vcpu_sbi_extension *vcpu_sbi[] = {
&vcpu_sbi_ipi,
&vcpu_sbi_base,
&vcpu_sbi_hsm,
+ &vcpu_sbi_srst,
&vcpu_sbi_legacy,
};

diff --git a/arch/riscv/cpu/generic/cpu_vcpu_sbi_replace.c b/arch/riscv/cpu/generic/cpu_vcpu_sbi_replace.c
index 3a4115a6..3cd226f9 100644
--- a/arch/riscv/cpu/generic/cpu_vcpu_sbi_replace.c
+++ b/arch/riscv/cpu/generic/cpu_vcpu_sbi_replace.c
@@ -24,6 +24,7 @@
#include <vmm_error.h>
#include <vmm_macros.h>
#include <vmm_manager.h>
+#include <vmm_stdio.h>
#include <vmm_vcpu_irq.h>
#include <cpu_sbi.h>
#include <cpu_vcpu_sbi.h>
@@ -147,3 +148,49 @@ const struct cpu_vcpu_sbi_extension vcpu_sbi_ipi = {
.extid_end = SBI_EXT_IPI,
.handle = vcpu_sbi_ipi_ecall,
};
+
+static int vcpu_sbi_srst_ecall(struct vmm_vcpu *vcpu,
+ unsigned long ext_id, unsigned long func_id,
+ unsigned long *args, unsigned long *out_val,
+ struct cpu_vcpu_trap *out_trap)
+{
+ int ret;
+ struct vmm_guest *guest = vcpu->guest;
+
+ if (func_id != SBI_EXT_SRST_RESET)
+ return SBI_ERR_NOT_SUPPORTED;
+
+ if ((((u32)-1U) <= ((u64)args[0])) ||
+ (((u32)-1U) <= ((u64)args[1])))
+ return SBI_ERR_INVALID_PARAM;
+
+ switch (args[0]) {
+ case SBI_SRST_RESET_TYPE_SHUTDOWN:
+ ret = vmm_manager_guest_shutdown_request(guest);
+ if (ret) {
+ vmm_printf("%s: guest %s shutdown request failed "
+ "with error = %d\n", __func__,
+ guest->name, ret);
+ }
+ break;
+ case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+ case SBI_SRST_RESET_TYPE_WARM_REBOOT:
+ ret = vmm_manager_guest_reboot_request(guest);
+ if (ret) {
+ vmm_printf("%s: guest %s reset request failed "
+ "with error = %d\n", __func__,
+ guest->name, ret);
+ }
+ break;
+ default:
+ return SBI_ERR_NOT_SUPPORTED;
+ };
+
+ return 0;
+}
+
+const struct cpu_vcpu_sbi_extension vcpu_sbi_srst = {
+ .extid_start = SBI_EXT_SRST,
+ .extid_end = SBI_EXT_SRST,
+ .handle = vcpu_sbi_srst_ecall,
+};
--
2.25.1

Anup Patel

unread,
Dec 4, 2020, 8:29:16 AM12/4/20
to Xvisor Devel
Applied this patch to the xvisor-next repo.

Regards,
Anup

Anup Patel

unread,
Dec 4, 2020, 8:29:29 AM12/4/20
to Xvisor Devel

Anup Patel

unread,
Dec 4, 2020, 8:29:40 AM12/4/20
to Xvisor Devel

Anup Patel

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Dec 4, 2020, 8:29:52 AM12/4/20
to Xvisor Devel
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