[PATCH] APX: Add R_X86_64_CODE_6_GOTTPOFF

[H.J. Lu]

Hi,

For TLS instructions:

add %reg1, foo@gottpoff(%rip), %reg2

and

add foo@gottpoff(%rip), %reg1, %reg2

add

#define R_X86_64_CODE_6_GOTTPOFF 46

if the instruction starts at 6 bytes before the relocation offset. It
should be used to encode APX NDD add instruction. It is similar to
R_X86_64_GOTTPOFF and linker optimization must take the different
instruction encoding into account. For APX NDD add, linker can optimize
them to

add $foo@tpoff, %reg1, %reg2


H.J.
---
x86-64-ABI/object-files.tex | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/x86-64-ABI/object-files.tex b/x86-64-ABI/object-files.tex
index e26264a..a9a8de6 100644
--- a/x86-64-ABI/object-files.tex
+++ b/x86-64-ABI/object-files.tex
@@ -489,6 +489,7 @@ or \texttt{Elf32_Rel} relocation entries.
\texttt{R_X86_64_CODE_4_GOTPCRELX} & 43 & \textit{word32} & \texttt{G + GOT + A - P} \\
\texttt{R_X86_64_CODE_4_GOTTPOFF} & 44 & \textit{word32} & \\
\texttt{R_X86_64_CODE_4_GOTPC32_TLSDESC} & 45 & \textit{word32} & \\
+ \texttt{R_X86_64_CODE_6_GOTTPOFF} & 46 & \textit{word32} & \\
\cline{1-4}
\multicolumn{4}{l}{\small $^\dagger$ This relocation is used only for LP64.}\\
\multicolumn{4}{l}{\small $^{\dagger\dagger}$ This relocation only
@@ -578,8 +579,11 @@ Storage''\footnote{This document is currently available via
the instruction starts at 3 bytes before the relocation offset where
linker expects a \code{REX} byte. \texttt{R_X86_64_CODE_4_GOTTPOFF}
should be generated, instead of \texttt{R_X86_64_GOTTPOFF}, if the
-instruction starts at 4 bytes before the relocation offset and linker
-optimization must take the different instruction encoding into account.
+instruction starts at 4 bytes before the relocation offset.
+\texttt{R_X86_64_CODE_6_GOTTPOFF} should be generated, instead of
+\texttt{R_X86_64_GOTTPOFF}, if the instruction starts at 6 bytes before
+the relocation offset. Linker optimization must take the different
+instruction encoding into account.
The relocations \texttt{R_X86_64_GOTPC32_TLSDESC},
\texttt{R_X86_64_TLSDESC_CALL} and \texttt{R_X86_64_TLSDESC} are also
used for Thread-Local Storage, but are not documented there as of this
--
2.43.0

[Michael Matz]

Hello,

On Mon, 5 Feb 2024, H.J. Lu wrote:

> For TLS instructions:
>
> add %reg1, foo@gottpoff(%rip), %reg2
>
> and
>
> add foo@gottpoff(%rip), %reg1, %reg2
>
> add
>
> #define R_X86_64_CODE_6_GOTTPOFF 46
>
> if the instruction starts at 6 bytes before the relocation offset. It
> should be used to encode APX NDD add instruction. It is similar to
> R_X86_64_GOTTPOFF and linker optimization must take the different
> instruction encoding into account. For APX NDD add, linker can optimize
> them to
>
> add $foo@tpoff, %reg1, %reg2

Is there any chance, at all, that we'll ever need CODE_6_GOTPCRELX, or
CODE_5_GOTPCRELX or CODE_5_GOTTPOFF? Can you rule it out? If not, I
think I'd rather define those now as well, to at least make a small
impression of sensible consecutive ordering of the relocations.


Ciao,
Michael.

[H.J. Lu]

I can't rule them out. But I can't find instructions to use them either.
I can add them just for completeness only.

Thanks.

--
H.J.

[Michael Matz]

I think I'd prefer to have them for completeness. Are there other
opinions from the group here?


Ciao,
Michael.

[H.J. Lu]

On Mon, Feb 05, 2024 at 05:15:52PM +0100, Michael Matz wrote:
> Hello,

>
> > > Is there any chance, at all, that we'll ever need CODE_6_GOTPCRELX, or
> > > CODE_5_GOTPCRELX or CODE_5_GOTTPOFF? Can you rule it out? If not, I
> > > think I'd rather define those now as well, to at least make a small
> > > impression of sensible consecutive ordering of the relocations.
> >
> > I can't rule them out. But I can't find instructions to use them
> > either. I can add them just for completeness only.
>
> I think I'd prefer to have them for completeness. Are there other
> opinions from the group here?
>

Here is the proposal to add 4 new relocations.

Thanks.


H.J.
---
Add 4 new relocations:

#define R_X86_64_CODE_5_GOTPCRELX 46
#define R_X86_64_CODE_5_GOTTPOFF 47
#define R_X86_64_CODE_6_GOTPCRELX 48
#define R_X86_64_CODE_6_GOTTPOFF 49

R_X86_64_CODE_5_GOTPCRELX, R_X86_64_CODE_5_GOTTPOFF and
R_X86_64_CODE_6_GOTPCRELX are added only for completeness.

R_X86_64_CODE_6_GOTTPOFF must be used to encode APX NDD add instructions:

add %reg1, foo@gottpoff(%rip), %reg2

and

add foo@gottpoff(%rip), %reg1, %reg2

It is similar to R_X86_64_GOTTPOFF and linker can optimize them to:

add $foo@tpoff, %reg1, %reg2
---
x86-64-ABI/object-files.tex | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/x86-64-ABI/object-files.tex b/x86-64-ABI/object-files.tex
index e26264a..25f0c8f 100644
--- a/x86-64-ABI/object-files.tex
+++ b/x86-64-ABI/object-files.tex
@@ -489,6 +489,10 @@ or \texttt{Elf32_Rel} relocation entries.

\texttt{R_X86_64_CODE_4_GOTPCRELX} & 43 & \textit{word32} & \texttt{G + GOT + A - P} \\
\texttt{R_X86_64_CODE_4_GOTTPOFF} & 44 & \textit{word32} & \\
\texttt{R_X86_64_CODE_4_GOTPC32_TLSDESC} & 45 & \textit{word32} & \\

+ \texttt{R_X86_64_CODE_5_GOTPCRELX} & 46 & \textit{word32} & \texttt{G + GOT + A - P} \\
+ \texttt{R_X86_64_CODE_5_GOTTPOFF} & 47 & \textit{word32} & \\
+ \texttt{R_X86_64_CODE_6_GOTPCRELX} & 48 & \textit{word32} & \texttt{G + GOT + A - P} \\
+ \texttt{R_X86_64_CODE_6_GOTTPOFF} & 49 & \textit{word32} & \\

\cline{1-4}
\multicolumn{4}{l}{\small $^\dagger$ This relocation is used only for LP64.}\\
\multicolumn{4}{l}{\small $^{\dagger\dagger}$ This relocation only

@@ -546,6 +550,13 @@ the \texttt{R_X86_64_REX_GOTPCRELX} relocation if the
relocation if the instruction starts at 4 bytes before the relocation
offset, should be generated, instead of the \texttt{R_X86_64_GOTPCREL}
relocation. See also section~\ref{opt_gotpcrelx}.
+
+If the instruction starts at 5 bytes before the relocation offset,
+the \texttt{R_X86_64_CODE_5_GOTPCRELX} relocation, instead of the
+\texttt{R_X86_64_GOTPCREL} relocation, should be generated,
+If the instruction starts at 6 bytes before the relocation offset,
+the \texttt{R_X86_64_CODE_6_GOTPCRELX} relocation, instead of the
+\texttt{R_X86_64_GOTPCREL} relocation, should be generated,
\end{sloppypar}

\begin{sloppypar}
@@ -578,8 +589,13 @@ Storage''\footnote{This document is currently available via

the instruction starts at 3 bytes before the relocation offset where
linker expects a \code{REX} byte. \texttt{R_X86_64_CODE_4_GOTTPOFF}
should be generated, instead of \texttt{R_X86_64_GOTTPOFF}, if the
-instruction starts at 4 bytes before the relocation offset and linker

-optimization must take the different instruction encoding into account.
+instruction starts at 4 bytes before the relocation offset.
+\texttt{R_X86_64_CODE_5_GOTTPOFF} should be generated, instead of
+\texttt{R_X86_64_GOTTPOFF}, if the instruction starts at 5 bytes before
+the relocation offset. \texttt{R_X86_64_CODE_6_GOTTPOFF} should be
+generated, instead of \texttt{R_X86_64_GOTTPOFF}, if the instruction
+starts at 6 bytes before the relocation offset. Linker optimization
+must take the different instruction encoding into account.

[Jan Beulich]

I second your view, and I'd like to further ask about
CODE_{5,6}_GOTPC32_TLSDESC, seeing we already have CODE_4_GOTPC32_TLSDESC.

Jan

[Michael Matz]

Heyho,

On Tue, 6 Feb 2024, Jan Beulich wrote:

> >>> Is there any chance, at all, that we'll ever need CODE_6_GOTPCRELX, or
> >>> CODE_5_GOTPCRELX or CODE_5_GOTTPOFF? Can you rule it out? If not, I
> >>> think I'd rather define those now as well, to at least make a small
> >>> impression of sensible consecutive ordering of the relocations.
> >>
> >> I can't rule them out. But I can't find instructions to use them
> >> either. I can add them just for completeness only.
> >
> > I think I'd prefer to have them for completeness. Are there other
> > opinions from the group here?
>
> I second your view, and I'd like to further ask about
> CODE_{5,6}_GOTPC32_TLSDESC, seeing we already have CODE_4_GOTPC32_TLSDESC.

Yeah, let's add those as well.


Ciao,
Michael.

[H.J. Lu]

Here is the merge request:

https://gitlab.com/x86-psABIs/x86-64-ABI/-/merge_requests/53


--
H.J.