Document MXCSR register behavior for exception handling

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H.J. Lu

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May 5, 2020, 4:43:38 PM5/5/20
to x86-64-abi
Although the control bits of the MXCSR register are callee-saved, they
are not restored by exception handling routines if they are changed in
the program execution. I created a merge request:

https://gitlab.com/x86-psABIs/x86-64-ABI/-/merge_requests/6

to document the current behavior. Any comments?

--
H.J.

Joseph Myers

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May 5, 2020, 5:11:14 PM5/5/20
to H.J. Lu, x86-64-abi
I think it's unhelpful to try to describe either MXCSR or the x87 status
and control words in terms of callee-saved and caller-saved. Rather, many
of the bits in those registers (exception trap enable / disable, rounding
mode, exception flags, etc.) are essentially like thread-local variables
(accessed via interfaces such as fesetround) and the rules for the
preservation of those bits are the rules that follow from the standard C
rules about when those variables change; on function entry and exit they
must have the values those variables must have at that time according to
C language semantics (which might sometimes be undefined, e.g. for
various bits in the absence of #pragma STDC FENV_ACCESS ON).

In the 32-bit Power Architecture ABI, we wrote more detailed wording about
"limited-access bits" to describe this situation.

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Joseph S. Myers
jos...@codesourcery.com

H.J. Lu

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May 5, 2020, 5:32:01 PM5/5/20
to Joseph Myers, x86-64-abi
On Tue, May 5, 2020 at 2:11 PM Joseph Myers <jos...@codesourcery.com> wrote:
>
> On Tue, 5 May 2020, H.J. Lu wrote:
>
> > Although the control bits of the MXCSR register are callee-saved, they
> > are not restored by exception handling routines if they are changed in
> > the program execution. I created a merge request:
> >
> > https://gitlab.com/x86-psABIs/x86-64-ABI/-/merge_requests/6
> >
> > to document the current behavior. Any comments?
>
> I think it's unhelpful to try to describe either MXCSR or the x87 status
> and control words in terms of callee-saved and caller-saved. Rather, many
> of the bits in those registers (exception trap enable / disable, rounding
> mode, exception flags, etc.) are essentially like thread-local variables
> (accessed via interfaces such as fesetround) and the rules for the
> preservation of those bits are the rules that follow from the standard C
> rules about when those variables change; on function entry and exit they
> must have the values those variables must have at that time according to
> C language semantics (which might sometimes be undefined, e.g. for
> various bits in the absence of #pragma STDC FENV_ACCESS ON).

Thanks for your feedback.

> In the 32-bit Power Architecture ABI, we wrote more detailed wording about
> "limited-access bits" to describe this situation.
>

I will take a look.

Thanks.

--
H.J.

H.J. Lu

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May 5, 2020, 7:02:00 PM5/5/20
to Joseph Myers, Girkar, Milind, Maslov, Sergey V, x86-64-abi
Here is the updated patch. You can download PDF file from

https://gitlab.com/x86-psABIs/x86-64-ABI/uploads/c8b8a0ac42a8ae09c840b3ee5797a51a/abi.pdf

Thanks.

--
H.J.
0001-Update-MXCSR-register-and-the-x87-control-word.patch
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