Dwarf2 register number for SSP

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Jan Beulich

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Feb 22, 2024, 10:02:37 AMFeb 22
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Hello,

seeing AMX registers get Dwarf numbers assigned, what about CET's SSP?
For stack unwinding that ought to even be required, in case shadow
stack switches need unwinding through.

Jan

H.J. Lu

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Feb 22, 2024, 11:25:13 AMFeb 22
to Jan Beulich, x86-6...@googlegroups.com
Since SSP is invisible to compilers, I don't know if the DWARF mapping
is needed.

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H.J.

Jan Beulich

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Feb 22, 2024, 11:45:51 AMFeb 22
to H.J. Lu, x86-6...@googlegroups.com
On 22.02.2024 17:24, H.J. Lu wrote:
> On Thu, Feb 22, 2024 at 7:02 AM 'Jan Beulich' via X86-64 System V
> Application Binary Interface <x86-6...@googlegroups.com> wrote:
>>
>> seeing AMX registers get Dwarf numbers assigned, what about CET's SSP?
>> For stack unwinding that ought to even be required, in case shadow
>> stack switches need unwinding through.
>
> Since SSP is invisible to compilers, I don't know if the DWARF mapping
> is needed.

Well, I'd expect a shadow stack switch to be done in assembly. But it
still ought to be possible to unwind through such a point, I suppose?

AMX registers also are pretty much invisible to compilers, aren't they?

Jan

H.J. Lu

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Feb 22, 2024, 11:49:51 AMFeb 22
to Jan Beulich, x86-6...@googlegroups.com
On Thu, Feb 22, 2024 at 8:45 AM Jan Beulich <jbeu...@suse.com> wrote:
>
> On 22.02.2024 17:24, H.J. Lu wrote:
> > On Thu, Feb 22, 2024 at 7:02 AM 'Jan Beulich' via X86-64 System V
> > Application Binary Interface <x86-6...@googlegroups.com> wrote:
> >>
> >> seeing AMX registers get Dwarf numbers assigned, what about CET's SSP?
> >> For stack unwinding that ought to even be required, in case shadow
> >> stack switches need unwinding through.
> >
> > Since SSP is invisible to compilers, I don't know if the DWARF mapping
> > is needed.
>
> Well, I'd expect a shadow stack switch to be done in assembly. But it
> still ought to be possible to unwind through such a point, I suppose?

It doesn't use DWARF.

> AMX registers also are pretty much invisible to compilers, aren't they?
>

Invisible to GCC, not to LLVM.

--
H.J.

Jan Beulich

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Feb 22, 2024, 11:57:12 AMFeb 22
to H.J. Lu, x86-6...@googlegroups.com
On 22.02.2024 17:49, H.J. Lu wrote:
> On Thu, Feb 22, 2024 at 8:45 AM Jan Beulich <jbeu...@suse.com> wrote:
>>
>> On 22.02.2024 17:24, H.J. Lu wrote:
>>> On Thu, Feb 22, 2024 at 7:02 AM 'Jan Beulich' via X86-64 System V
>>> Application Binary Interface <x86-6...@googlegroups.com> wrote:
>>>>
>>>> seeing AMX registers get Dwarf numbers assigned, what about CET's SSP?
>>>> For stack unwinding that ought to even be required, in case shadow
>>>> stack switches need unwinding through.
>>>
>>> Since SSP is invisible to compilers, I don't know if the DWARF mapping
>>> is needed.
>>
>> Well, I'd expect a shadow stack switch to be done in assembly. But it
>> still ought to be possible to unwind through such a point, I suppose?
>
> It doesn't use DWARF.

Am I misremembering that .eh_frame uses the same register numbers?

Jan

H.J. Lu

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Feb 22, 2024, 12:51:36 PMFeb 22
to Jan Beulich, x86-6...@googlegroups.com
SSP unwind doesn't use .eh_frame.


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H.J.

Roland McGrath

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Mar 24, 2024, 7:35:34 PMMar 24
to H.J. Lu, Jan Beulich, x86-6...@googlegroups.com
I would strongly encourage assigning DWARF numbers for all registers.  It doesn't matter if compilers ever use a register or not.  Assembly code can, and assembly code can describe unwinding it with explicit `.cfi_*` directives even if you don't know why someone would want to.  For some machines, the psABI has been wise enough to preemptively assign DWARF numbers for all the system (privileged) registers as well.  These are things that compilers never think about and often regular user code can't even use.  But debuggers for emulators and virtual machines can access all of them, and DWARF register numbers are a great universal vocabulary for referring to any kind of register on each architecture.
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