[dev] Assembler for bootloader

[Sagar Acharya]

I have made this program ganyantra.c which can convert a program named program.s to binary. Here program.s is a sequential assembly like

LUI x1, 0x23000
ADDI x2, x1, 0x345
...
SB x1, x4, 40

It has all RV32IM instructions and following suckless principles, it is easy to use. Soon, one can place various such binaries at various memory locations and straightaway flash it to create bootloader + OS for RV32I.

https://notabug.org/sagaracharya/dcc

Hope this helps.

===============
Thanking you
Sagar Acharya
https://whitelist.co.in

[Roberto E. Vargas Caballero]

Hi,

On Sat, Jun 07, 2025 at 02:36:07PM +0530, Sagar Acharya wrote:
> I have made this program ganyantra.c which can convert a program named program.s to binary. Here program.s is a sequential assembly like
>
> LUI x1, 0x23000
> ADDI x2, x1, 0x345
> ...
> SB x1, x4, 40
>
> It has all RV32IM instructions and following suckless principles, it is easy to use. Soon, one can place various such binaries at various memory locations and straightaway flash it to create bootloader + OS for RV32I.
>
> https://notabug.org/sagaracharya/dcc

Interesting. If you are interested in compilers, you can help me a bit with scc [1].

Regards,

[1] https://www.simple-cc.org

[Sagar Acharya]

scc is amazing, like all other compiler recommendations from suckless.

Can you help with making a linear RV32I code from C code? I think it should be very similar to arm. Currently, jump instructions have different notation in ganyantra like loop is not detected, etc.

I am unable to understand how linking and loading happens as they seem board specific.

Update: bitgen.sh can now help with generating a final binary file that is to be written on flash. Fixed minor bugs.

[Roberto E. Vargas Caballero]

Hi,

On Tue, Jun 10, 2025 at 03:43:41PM +0530, Sagar Acharya wrote:
> scc is amazing, like all other compiler recommendations from suckless.

Thank you!

>
> Can you help with making a linear RV32I code from C code? I think it should be very similar to arm. Currently, jump instructions have different notation in ganyantra like loop is not detected, etc.
>

Due to the collaboration between scc and qbe, the arm64, amd64 and riscv64 ports
are implemented using qbe, that does all the instruction selection work.
Sadly, qbe has strong design decisions tied to 64 bit architecturesthat make
hard (in the current state) to create ports for 32 bits (or my main interest,
z80, a 8 bit processor xD).

What is easy in scc is to implment the riscv32 assembler. I have code to support
coff32 and I cover elf partially (in fact, I have pending patches for elf in
my local workcopy, but I have to finish the wchar.h work before continuing with
elf).

> I am unable to understand how linking and loading happens as they seem board specific.

If you need help, I can help you with it. For me, the best doc to understand linkers
and loading process was "Linkers and loaders". You can find a early version of it in
[1], but I recomend you to buy it.

> Update: bitgen.sh can now help with generating a final binary file that is to be written on flash. Fixed minor bugs.

Nice! The problem with assemblers come when you take in consideration
relocations, and then you have to go with binary formats and it increases
the complexity a lot.

Just send me a email if you need some help to understand these topics.

Regards,

[1] http://www.staroceans.org/e-book/LinkersAndLoaders.pdf

[Sagar Acharya]

I have updated the repo to my server. Many bugs have been fixed and now it is verified that it can compile all instructions to binary right.

<http://sagaracharya.in/git/dcc/>

You can find the code here. There's a tarball which you can download.

More updates in future.