I'm not entirely sure what your question is, Jerome...Very much appreciated. I was away for a week. I am catching up now.
But I'll make some comments anyway.
On 2012-01-15 15:37, Jerome H. Fine wrote:I actually agree with you. The only reason that I mention the
I have an interesting hardware question.Correct.
I have been looking at the results for the program RESORC.SAV in RT-11
with respect the MFPT instruction. When the J11 chip is used, the value
is 5 and the Maintenance Register at 177750 seems to determine what the
rest of the actual hardware supports.I thought it would also be helpful for the user to know if an emulator is beingIf an emulator wants to truly emulate a specific CPU, then you cannot just go and change the behavior of the emulator, since you will break the basic idea behind it.
used, either software or hardware, or if perhaps some other 3rd party hardware
CPU. I would probably target the various 3rd party boards as far as hardware
is concerned (such as QED and Mentec). For software emulators, I would
suggest that only the high end PDP-11 processors be supported (the DEC
CPUs which support the MFPT instruction) in order to keep things simple,
at least initially.
As far as different implementations goes, what is the difference between an emulator and a "real" CPU? Both are running code to implement the PDP-11 architecture. It's just that if the emulator is running on an x86 (for example), the microcode happens to be identical to x86 assembler, whilst the J11 (for example) have a microcode CPU which we don't know much about, but it still executes the microcode instructions...
Yes. I seem to remember they were first. Do you classify them asAn incomplete list of software emulators is:You have Strobe Data, which I'm sure you'll remember now that I mention them.
SIMH
Ersatz-11
An incomplete list of hardware boards is:
QED - more than 1?
Mentec - at least 3
and I can remember at least 2 others, but not the company names.
The reason that I specifically mention the PDQ-1000 is that whileRight now the Logical Co. has a combined emulator called aYes... And...?
PDQ-1000 board which actually plugs into a Qbus which takes
only 4 slots, but includes CPU, memory and many controllers.
I had my doubts as well, so I do agree with you. But if no one elseThus far, the high order byte of the MFPT instruction always seemsRight, except then they wouldn't truthfully emulate a J11.
to be zero and is currently ignored by the RESORC.SAV program.
Under SIMH and Ersatz-11, it would be trivial to use the high order
byte of the MFPT instruction to signify which software emulator is
being used.
And basing your design on how one application in RT-11 works seems like an extremely bad idea.
Understood. It would have been "nice" if DEC had supportedCan anyone who has a DEC (or non-DEC) PDP-11 system easilyThat is all the values that MFPT can return. (Or rather - all the values that were returned by any CPUs designed by DEC.)
available determine the actual value returned by the MFPT instruction?
As far as I know:
MFPT Value Hardware
1 PDP-11/44
3 PDP-11/24 (should be 2)
3 PDP-11/23
4 SBC-11/21
5 All J11 chips including 11/73, 11/83, 11/93
And of course, the result is that they reported a particular DECI assume that it would be extremely difficult, probably not worth theSome Mentec boards use a J11. You can guess what they return. For the other boards, they also seem to pretend to be J11 CPUs, which is a bit sad, but that can't be helped.
effort, to modify the high order byte of the MFPT instruction at this
point for the 3rd party PDP-11 CPU boards, such as from Mentec.
Yes, you are correct. Even DEC used the J11 chipCan anyone comment on this assumption? Might there be anotherPlease differ between which *board* is being used, as opposed to which CPU. MFPT will only tell you which CPU is used, not which board.
way for hardware to the tell a user which 3rd party board is being
used as a PDP-11?
Your suggestion to use an instruction code which is presentlyThe other possibility is to use the Maintenance Register at 177750,That register is specifically designed to tell you which board you have, as opposed to MFPT, which tells which CPU.
although I suspect that there might not be any more bit available.
And yes, there are bits left.
In the mainenance register, you have 4 bits allocated to system type.
(Note, not CPU type, system type.)
0 - 11/73
1 - J11-A (M11, N11)
2 - KDJ11-B (11/73, 11/83)
3 - KXJ11 (11/73)
4 - 11/53
5 - 11/93
This I collected from the system identification code in RSX. The 0 is not explicitly stated to be an 11/73, rather, the code checks for the values 1-5, and if none of those, it assumes it is an 11/73. I very much doubt any DEC boards ever used any codes above 5, although you can have up to 15.
The CPU identification code in RSX is very useful to read on how to identify what kind of system it is.
Essentially, it goes like this:
1) Check if the SYSID registers exist
1.1) If yes, this is an 11/70 or 11/74.
1.2) Check if high bit of PDR is usable.
1.3) If yes, this is an 11/74. If no, this is an 11/70
2) Try MFPT
2.1) If it worked, we have a basic idea of system
2.2) 1 - 11/44
2.3) 3 - Possibly 11/23B or 11/24
2.3.1) Read maintenance register
2.3.2.1) If that succeded - check if bits 4-7
2.3.2.2) If 4-7 = 0 it is an XT system. Treat as unknown system.
2.3.3) Try writing to SWR
2.3.3.1) If that fails - system is an 11/23B
2.3.3.2) If that succeeds - system is an 11/24
2.4) 5 - J11 Based machine
2.4.1) Read maintenance register, look at bits 4-7
2.4.1.1) If that fails - unknown machine
2.4.1.2) 4 - 11/53
2.4.1.3) 3 - KXJ11 based 11/73
2.4.1.4) 1 - Real J11-A?
2.4.1.4.1) Check if writing to kernel PDR7 change state of W bit of register to written.
2.4.1.4.1.1) If yes, we have an M11
2.4.1.4.2) Try MED instruction
2.4.1.4.2.1) If it works, we have an N11
2.4.1.4.3) Unknown type of CPU
2.4.1.5) 2 - KDJ11-B type. (11/83, 11/84)
2.4.1.6) 5 - KDJ11-E-type. (11/93, 11/94) (Codenamed Thunderbird apparently)
2.4.1.7) All others are called 11/73 (But the code will actually store model as 11/9x)
3) If MFPT fails, M+ states that system must be 11/60, 11/34, 11/45, LSI-11, 11/04, 11/05, 11/10, 11/15, 11/20 or 11/40.
3.1) Check 11/60 MED instruction
3.1.1) If that works, it is an 11/60
3.2) Check 11/34 MFPS instruction
3.2.1) If that works, it is an 11/34
3.3) Check 11/45 PIRQ register
3.3.1) If that exist, it is an 11/45
3.4) Of the rest, RSX-11M-PLUS only works on the 11/40
Also, for the machines which both have Qbus and Unibus variants, the code then goes on to check if the machine have a Unibus map, and if so, changes it to the Unibus version of the CPU.
All with the reservation that I might have missed something, written something down wrong in my transcribing the code into the rules above, and that this is obviously not enough to actually implement it, since the details for some of these steps are rather intricate in actual execution.
Anyway. If you have something that intends to implement a J11, it should do the same thing a J11 does, which means MFPT should return 5. Anything else is bad.
The maintenance register is a possible place to put something else in, if you just want to identify your actual system differently, but once more, if you really want to emulate an existing system, you cannot touch that register either.
If you want some "foolproof" way of detecting that you are inside an emulated machine, I'd say that adding a new instruction from the unused opcodes is probably a better idea. I wouldn't expect anything to actually try using an undefined opcode anyway, so no existing code should be hurt by it. And your "new" code will also work on real machines, in that you will instead get a trap if you try that instruction.
>On Sun, 15 Jan 2012 09:37:21 -0500, "Jerome H. Fine" wrote:
As I already answered with Johnny, I have my ownI have an interesting hardware question. I have been looking at the results for the program RESORC.SAV in RT-11 with respect the MFPT instruction. When the J11 chip is used, the value is 5 and the Maintenance Register at 177750 seems to determine what the rest of the actual hardware supports. I thought it would also be helpful for the user to know if an emulator is being used, either software or hardware, or if perhaps some other 3rd party hardware CPU. I would probably target the various 3rd party boards as far as hardware is concerned (such as QED and Mentec). For software emulators, I would suggest that only the high end PDP-11 processors be supported (the DEC CPUs which support the MFPT instruction) in order to keep things simple, at least initially.<snip> Modifying the MFPT instruction is not the right way to go. CPU software detection is a delicate business and that process should not be interfered with directly.
In any case, an emulator is not equivalent to a processor type since SimH and E11 support a range of PDP-11 CPUs.
It would even be possible to tell the user details ofSome CPU software detection is handled by examining CPU behavior. The same process can be used to detect an emulator and to determine which emulator is being used.
I don't think that the about properties (or at least howI currently use some of the behavior of the MMU SR0 and SR1 to detect emulators in RUST. Clearly, these tests only work when E11 and SIMH are emulating a machine with MMU, but that's their default state and there's not much point running RUST in other configurations. Here's some of the code: bt$emu: call tr$cat ; capture traps ... ; skip V11 checks mov #m$msr0,r0 ; emulator check mov #m$msr1,r1 ; tst (r1) ; got MMU with SR1 etc? bcs 40$ ; nope clr (r0)+ ; clear SR0 with increment bis #160000,-(r0) ; overwrite and freeze cmpb (r1),#27 ; SIMH magic number bne 10$ ; not SIMH btwar$ <Emulator detected: SIMH>; br 20$ ; ; 10$: mov #340,(r0) ; SR0 = 340 cmpb (r0),#140 ; E11 magic number bne 30$ ; not E11 btwar$ <Emulator detected: E11>; (misses some read-only bits) ; 20$: inc b$temu ; is emulator ; 30$: clr (r0) ; make them all clean again clr (r1) ; 40$: call tr$res ; restore traps return There is more code which checks for my V11 emulator. That check is done with a hacked IOT instruction. The reason I need detection is because emulators lack standard terminal output behavior which I use during startup to detect the clock rate of a PDP-11 (I count the number of null characters output to the console terminal per clock tick and use a table to determine both the clock rate and the terminal rate). The test doesn't work on E11, SIMH or V11. In fact, the V11 emulator has a little API which is used to pass information between the emulator and the system. It's used to relinquish control so that the emulator doesn't hog all the CPU time and for various other functions. It would be great if there was a common API for PDP-11 emulators for this kind of thing, but I'm not sure the motivation is there for the effort involved.
(snip, someone wrote)
I have been looking at the results for the program RESORC.SAV in RT-11 with respect the MFPT instruction. When the J11 chip is used, the value is 5 and the Maintenance Register at 177750 seems to determine what the rest of the actual hardware supports.
(snip, someone else wrote)
Modifying the MFPT instruction is not the right way to go. CPU software detection is a delicate business and that process should not be interfered with directly.
My suggestion would be to treat the speed differenceIn any case, an emulator is not equivalent to a processor type since SimH and E11 support a range of PDP-11 CPUs.Also right. And each CPU behaves differently, and the emulator needs to follow that, or it is broken.Or, the emulator can emulate a CPU model different from any previously built. That usually at least happens in that the emulator runs at a different speed than any real processor.
Some CPU software detection is handled by examining CPU behavior. The same process can be used to detect an emulator and to determine which emulator is being used.
As has been pointed out, however, an emulatorRight. I just posted an outline of how RSX-11M+ detects system type. It's a combination of available information as well as CPU behavior in very weird and possibly not documented ways.I have seen the rules for detecting different x86 CPUs, from 8086 and 8088 on up. Some are pretty strange, though usually documented at least as needed for detection.
I have been looking at the results for the program RESORC.SAV in RT-11
with respect the MFPT instruction. When the J11 chip is used, the value
is 5 and the Maintenance Register at 177750 seems to determine what the
rest of the actual hardware supports.
Modifying the MFPT instruction is not the right way to go. CPU
software detection is a delicate business and that process should not
be interfered with directly.
In any case, an emulator is not equivalent to a processor type since
SimH and E11 support a range of PDP-11 CPUs.Also right. And each CPU behaves differently, and the emulator needs toOr, the emulator can emulate a CPU model different from any previously
follow that, or it is broken.
built. That usually at least happens in that the emulator runs at a
different speed than any real processor.
Right.We seem to have travelled full circle. As I mentioned,
And yes, that could definitely be done, at which point I think a new value returned by MFPT would be reasonable.
Do you have a manual name and page number whichThe 800hz option isn't present on the 11/73. It's not documented in the CPU guide and I note that SimH only provides the "JCLK" option for the 8x and 9x CPUs but not for the 73. In any case, since the option settings for 50/60/800 hz are visible in a processor register (xx177520) I don't need to detect the setting in a timing loop. It's just a matter of a CPU and CSR detect.
On Wed, 25 Jan 2012 22:22:05 -0500, "Jerome H. Fine" wrote:I don't think that the about properties (or at least how the PDP-11 instructions react to the above code) has been documented under Ersatz-11. I would imagine that the source code could be used under SIMH to figure out why the above code is needed. I am VERY curious!!!!!!!!! How did you figure out the code for Ersatz-11? Did John Wilson help? Does the above code still work with V6.0 of E11?I didn't use the source code for SimH. It's often easier to use a debugger to "read" the system behavior than it is to hunt through sources. I just experimented until I found a suitable test. I also tested on real F11 and J11 systems. The trick was to find some "undefined" behavior that didn't need correction. The code above gets different results from an F11 and a J11 as well as from SimH and E11. The test is far from ideal, but it works well enough for my purposes. The test works with V6.0 of E11.
I note that the Page Control Register is at 177520,Seems like E11 don't set that register right for 800 Hz then.
so I am extremely curious as to how that register
also holds the clock rate. Using a PDP-11/83,
177520 is set at 4000 for 60 and 800 Hz and
at 2000 for 50 Hz when I run Ersatz-11. I don't
have my DEC PDP-11/83 working at the
moment, so I can't use the real DEC hardware.
It should have been 6000.
Of course, it might be that E11 don't truly set the clock to 800 Hz as well, or that it emulates a KW11-P in that case...?
>On 2012-01-26 04.21, Jerome H. Fine wrote:I wouldn't call any of their implementations an emulator. It's a PDP-11. I'm not even sure what the point is in trying to make the distinction between a "hardware" and a "software" emulator. As I points out at another place, all PDP-11s except for the PDP-11/20 are implemented using microcode. So, in short, it is all done in software. The actual instructions performed by the hardware have little to no resemblance to a PDP-11 instruction.You have Strobe Data, which I'm sure you'll remember now that IYes. I seem to remember they were first. Do you classify them as
mention them.
a hardware or software emulator? If my hazy memory is correct,
Strobe Data initially used the J11 chip on a board that plugged
into an ISA slot on a DOS machine. Later, the J11 chips were
very difficult to obtain, so Strobe Data managed to do something
else.
Be that the microcode engine in the J11 CPU, or the x86 underlying the E11.
Try to think of x86 instructions as microcode for the E11 CPU, if that helps.
And what is the difference? The J11 is also a software implementation.The reason that I specifically mention the PDQ-1000 is that whileRight now the Logical Co. has a combined emulator called aYes... And...?
PDQ-1000 board which actually plugs into a Qbus which takes
only 4 slots, but includes CPU, memory and many controllers.
it seems like a hardware emulator (since the final result is a Qbus
board), inside the hardware is actually a software emulator.
What you then might seek is a middle ground. Let's make the system act just like an existing machine made by DEC, but let's make additional features available to code that actually can figure out that this is not a normal 11/93 (or whatever). That is the point when you hit the problem that you need to truthfully emulate an 11/93, but still need to do something that is incompatible with an 11/93. So, what is the least intrusive incompatibility you can think of.
I say it is having an undefined instruction (which in all likelyhood no existing program would be using anyway) actually not trap, but instead do something.
And of course, the result is that they reported a particular DECThe ones I can think off are the M70, M100, M11. M70 uses a J11. M11 uses Mentecs own FPGA implementation. The M11 have a TOY clock, but it is not compatible with the 11/9x TOY. Also, the M11 adds one more instruction not existing in the J11, namely MOVR, which is a block move instruction. Takes three registers as arguments. Source address, destination address and length.
CPU as being used. What were the names of all of the Mentec
boards and their primary difference from each other?
There are more CPUs by Mentec, and possibly also other features/differences between them that I don't know of.
Existing code already identify Mentec boards. Not surprising, considering that Mentec owned the major OSes for a while.
QED processors looks like DEC ones as far as OSes are concerned.
>On Thu, 26 Jan 2012 15:12:29 +0100, Johnny Billquist wrote:What about RUST? Could that support a new instruction as well?Already answered by Ian. And yes, in short, adding a new instruction in any emulator is trivial. There is no standard. We might try to make a suggestion. But that's all we could do.We could do more if we wanted to. SimH is open source, so it is entirely possible to add private code. E11 supports an extension API which could be used to implement an API. The problem is, however, that this kind of thing isn't really worth it unless it's part of the standard configuration. Perhaps that could come later...
>On Wed, 25 Jan 2012 22:25:11 -0500, "Jerome H. Fine" wrote:I note that the Page Control Register is at 177520,
so I am extremely curious as to how that register
also holds the clock rate. Using a PDP-11/83,
177520 is set at 4000 for 60 and 800 Hz and
at 2000 for 50 Hz when I run Ersatz-11. I don't
have my DEC PDP-11/83 working at the
moment, so I can't use the real DEC hardware.
I used the 11/94 CPU document below, page 5-27
http://www.bitsavers.org/pdf/dec/pdp11/1194/EK-PDP94-MG-001_Sep90.pdf
BTW: The document above has the Page Control Register at 177522, not
177520. See page 5-29.
Uh. The page control register is indeed at 177522, but that is not the register holding the information we talk about. (Jerome confused?).
It's the Control/Status register we are talking about, and that is at 177520.
Also, what led you to attempt to use the hardware in that manner. It does not seem very obvious as to why the hardware registers (software in the case of a software emulator as opposed to a real DEC CPU) would behave in that fashion.I spent the first year or so of my PDP-11 career working almost entirely at the switch register of an 11/20. You learn to read the binary state of the machine as "source code". I remember once during a switch register session looking at the clock and noticing it was twelve midnight. The next time I looked it was eight in the morning. I still enjoy reading binary and making sense of it. I guess others here have had similar experiences. Selecting the MMU registers was initially process of elimination. Following that, I knew that E11 doesn't actually attempt to fully implement MMU register SR1. I started playing around on a J11 and F11 to see what happened when I jammed those registers in an illogical manner. After a little experimentation I found a test which came out differently on the F11 to the J11. Then I played around with E11 and SimH. It's not that hard, and it's not the ideal test either.
Can anyone else verify what Ian found?RUST/SJ runs the test everytime it boots. It currently issues a message when its booted under SimH or E11. Actually, the message is a bit annoying and needs to be muted except in verbose boot mode. I also have a little ENV.SAV utility which runs the test. I'll try to find the time to put it on my upload site (where I still have to find the time to package and upload the RUST driver sources). Ian
No. Just no. SimH will never add "features" that didn't exist in the real hardware.
Google Search
Mentec CPUs
http://en.wikipedia.org/wiki/Mentec_PDP-11
Sales Figures
http://www.fuse-network.com/fuse/demonstration/30/24675/24675.pdf
Jerome Fine
But, to reiterate my stand, I don't particularly feel the need for this at all. And I am unclear on what Jerome needs, and why.
As an extension to this, you could also add new features, which would be used when identified as such a machine, but this seems unlikely in general.But I think new features belongs in the fork mentioned above.