Fwd: Hurrey!! Openings for Verification, Design and Validation @ your door step

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Sandeep Bishnoi

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Aug 28, 2012, 12:36:48 AM8/28/12
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Hi,

Greetings!

We are looking for MTS/SMTS –Verification & SMTS-Design & MTS/SMTS- Validation for US Based Semiconductor Company. (From Networking Domain)

Location : Hyderabad

Job Description:

For SMTS- Design:

Description of Position: 

Working on various aspects of the front end design of ASIC projects. This includes micro architecture, RTL Coding, Block – Level test bench design and development, Block level verification, full – chip integration and verification, Assertions, Monitors. Work on lint, synthesis, timing analysis, LEC etc.

QUALIFICATIONS

Required: 

Strong academics with total experience of 7+ years and minimum design experience of 5 years.

Strong in logic design.

5+ years experience in RTL design working on High speed ASIC’s.

Experience in synthesis and Static timing analysis.

Preferred: 

Exposure to Layout.

Experience in Ethernet domain.

For MTS/SMTS Verification:

Required:

v  Minimum 2 years of ASIC verification experience is required for MTS and for SMTS 7+ yr exp required.

v  Experience with IP and Ethernet network is desired.

v  Knowledge of Vera, System Verilog, ‘e’, SystemC is desired.

v  Exposure to advanced verification methodologies like URM, eRM, RVM, AVM or OVM etc is desired.

v  Prior experience in HVL’s like Open Vera, SystemVerilog, ‘e’ language is desired.

v  Strong programming skills in C and object oriented programming (C++ or other OO language)

v  Strong scripting skills in Unix scripting languages (bash, csh, etc), TCL and Perl

v  Strong in HDL’s - Verilog / VHDL

v  Expert in Verilog for verification and be able to read designs.

v  Strong in digital design.

v  VHDL or Verilog, and C programming experience

v  Experience working with embedded systems

v  Experience with processor/DSP verification is desired.

v  Should possess good communication and Interpersonal Skills

 

Preferred:

v  Domain knowledge in networking.

v  Exposure to ARM/MIPS firmware/assembly coding.

v  Should be self motivated.

v  Prior experience in interacting with multi site teams will be a big plus.

v  Prior experience leading a team is required.

v  ASIC Bring up experience is a plus.

v  SOC Experience is a plus.

v  Bright, talented, and easy to work with.

 

For MTS/SMTS Validation:

Exp- 2+ for MTS and & 7+ for SMTS

Required Qualifications:

·               Familiar with Smart Bits, Ixia or Adtech traffic generation equipment.

·               Thorough knowledge of the techniques used to test, stress and margin semiconductors    across voltage and temperature extremes in order to catch potential process engineering defects.

·               Working knowledge of applications software and be fluent in C/C++ and have a working knowledge of Perl and tool command languages (TCL) for use in controlling lab equipment.

·               Working knowledge of Linux, batch scripting, Makefiles and software revision control etc.

·               Ability to analyze semiconductor designs relative to their performance, reliability and cost including DFM (Design Manufacturability) to insure reliable product performance over extended product life cycles.

·               Experience designing software to test design requirements and product features of large communications SOC's (system on chip)

·               System Verilog

·               Strong in digital design

·               Strong in HDL’s - Verilog / VHDL

·               ASIC bring up experience

·               Good knowledge in timing analysis

·               Exposure to ARM/MIPS firmware/assembly coding

·               Domain knowledge in networking will be given preference

·               Must possess excellent interpersonal, analytical and communications skills 

·               Be able to work in a challenging and engaging work environment that promotes teamwork, creativity, accountability and professional development

·               Must be self motivated

·               Prior experience in interacting with multi site teams

·               Prior experience in managing a team

 

Preferred Qualifications:

·               Experience with Ethernet and SONET networking standards

·               Experience in HVL’s like OpenVera, SystemVerilog, etc.

·               VHDL or Verilog, and C programming experience

·               Experience working with embedded systems

·               IP and Ethernet network knowledge

·               Scripting experience (Perl, shell, etc.)

EDUCATIONAL QUALIFICATIONS

Bachelors / Masters Degree in Engineering from one of the local reputed universities.

 If Interested Kindly send your updated resume along with available contact no with preferable time to contact you.
(References for above requirements will be highly appreciable)

--
Please feel free to contact me for further clarifications.
 
Thanks & regards
Vandana
(Sr. HR Recruiter)
Mantra Consulting
A Division of Mantra Group OfCompanies
_______________________________________________________________________________
 
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