Verification Engineers required with PCI Express

[Vasu]

Dear friends

Please share your profiles for the below mentioned requirements

ASIC Design Engineer

Description:

In this critical design role the engineer will develop ASICs using
industry standard tools and design methodologies. Assignments will
include design specification, Verilog HDL coding, synthesis,
functional and formal verification, timing analysis, and silicon
debug. The position also requires the engineer to work with the
verification and firmware teams for ASIC verification using system
simulation environment.
Qualifications:

Requires experience in following areas:

• ASIC Architecture Design
• Verilog RTL Design
• Verilog Simulation/Verification (Conventional, Assertion Based,
Formal)
• RTL Synthesis, Equivalence Checking, Static Timing Analysis
• Design Debug and Validation
• Design Documentation
• Knowledge of PCI Express is a must
• Knowledge of Fibre Channel, Ethernet protocol will be considered
plus
• BS or MS or equivalent degree in Electrical Engineering, Computer
Engineering or related discipline with 10+ years of experience


Title: ASIC Verification


Required Experience:

• BS or MS or equivalent degree in Electrical Engineering, Computer
Engineering or related discipline with 5 to 12 years of experience
• Experience developing and using system or block level complex test
benches as well as writing verification plans and requirements
• Experience implementing directed and random test cases
• Must have experience with Verilog, System Verilog, code and
functional coverage. (OVM/VMM/Formal Verification experience would be
a plus.)
• Excellent written & verbal communications skills
• Experience with industry standard protocol. (PCI Express or Ethernet
would be a plus)
• Object Oriented programming and Perl/shell scripting experience
• Storage and/or Ethernet Industry experience preferred.

Desired Experience:

• Hands on experience in Verilog, System Verilog, Ethernet or PCIe or
other industry standard protocols.

Job Location:
Pune, India

regards

Vas