Verification/Design- Asic engineers required for pune- PCI Express/Ethernet Protocols exp is must

[Vasu]

Dear friends

Please send across your profile for the positions based out in Pune

Position:ASIC Design
Loc:Pune

ASIC Architecture Design
Verilog RTL Design
Verilog Simulation/Verification (Conventional, Assertion Based,
Formal)
RTL Synthesis, Equivalence Checking, Static Timing Analysis
Design Debug and Validation
Design Documentation
Knowledge of PCI Express is a must
Knowledge of Fibre Channel, Ethernet protocol will be considered plus
BS or MS or equivalent degree in Electrical Engineering, Computer
Engineering or related discipline with 10+ years of experience


#2

Position:ASIC verification


Required Experience:

BS or MS or equivalent degree in Electrical Engineering, Computer
Engineering or related discipline with 5 to 12 years of experience
Experience developing and using system or block level complex test
benches as well as writing verification plans and requirements
Experience implementing directed and random test cases
Must have experience with Verilog, System Verilog, code and functional
coverage. (OVM/VMM/Formal Verification experience would be a plus.)
Excellent written & verbal communications skills
Experience with industry standard protocol. (PCI Express or Ethernet
would be a plus)
Object Oriented programming and Perl/shell scripting experience
• Storage and/or Ethernet Industry experience preferred.

Mandatory Experience

Hands on experience in Verilog, System Verilog, Ethernet or PCIe or
other industry standard protocols.

Regards
Srini