query about CMOS

[amiit puri]

Q.when we give the input z to the gate in nmos .What will be the output come at the drain?Explain in detail.

Q.when we give the input x to the gate in nmos .What will be the output come at the drain?Explain in detail.

Thanks & Regards

Amit Puri

[Silicon Guru]

How will you drive Z and X to the input of NMOS? Can you please explain this?

Your answer lies in this...

Rgds

[amiit puri]

Dear Sir,

first of all i would like to thanks for responding to me and sorry for late reverting  to you.....so anyways come to your

point sir, my query is if we have an AND gate having inputs A ,B and  output C, what would be the output when A=1 ,and B=X or Z

.if i elaborate more to the example, suppose if A=1 and B is disconnected having neither 0 nor 1 . what would be value of output.

And for X ,the value would be lie between the range of low levels and range of high levels. it would neither be low range i.e ( 0 to 0.8 V ) nor be high range i.e (mostly 2V to 3.3V).Actually i am talking about the between 0.8 V to 2 V i.e unacceptable range.

Regards 

Amit Puri

[Silicon Guru]

Amit,

 

When we design the digital gates the expectation from the deesigners is that we should not allow to have X (Multiple drivers) and Z (Open Input nets) in our devices.

 

Now X and Z may still be there due to device manufacturing faults, or due to a human design mistake, so in that case the output will be indeterministic (As the AND gate works strictly on known logic level). And if this indeterminstic output of one gate is allowed to propagate in the chip the functionaly of the chip will become indeterminstic. In digital circuits all transistors are bound to work in either Saturation or in Cut Off region and due to this indetermistic voltage at the input of the gates the transistors may go into Active region and ... it may burn the chip also if both the CMOS gates comes in Active region of operation due to the changes in the input voltage levels.

 

I hope this answers your qustion.

 

Regards

[Akashdeep gautam]

Amit,

  

     The voltage at the not connected terminal depends upon the type of family we are using for example if we use TTL family then the not connected terminal will we treated as open and in ECL family they will be treated as the One.