friday reading group

[Adam Cabe]

All,

I have selected a paper on SOI technology, processes, and circuits for the reading group this week.  The paper itself is actually very long, however I believe that we don't need to go through all sections, only the relevant ones to circuits issues.  I would propose to read the first 2 pages on the Introduction and motivation, and then sections 3-6A.  Feel free to read the rest if you're inclined, it mainly covers the SOI fabrication process.

http://scitation.aip.org/getpdf/servlet/GetPDFServlet?filetype=pdf&id=JAPIAU000093000009004955000001&idtype=cvips&prog=normal

The paper is called "Frontiers of silicon-on-insulator" by G. K. Celler et. al., in case the link doesn't work.  This paper serves as an overview of SOI technology, both for FD and PD.

If anyone can find a nice circuit design paper for fully-depleted SOI (not PD), we could also go over this as well.  I looked for some time, and many papers that I found were either old, not good, or use some non-standard FD SOI process (i.e. back-gating, etc).  If I find one in the next day I will send it out as well.

Thanks, and see you all Friday at 2.

[Wei Huang]

I found a paper in IBM J of R&D about FD SOI and some basic circuit stuff:

 

"SOI technology for the GHz era", it was published in 2002.

 

http://www.research.ibm.com/journal/rd/462/shahidi.pdf

 

-Wei

[Adam Cabe]

All,

After doing quite a bit of reading I did find one paper that discusses some dynamic switching issues related to FD SOI circuits.  I know this is short notice, so you don't have to read it, however I may point out a few things from this paper.  Even if you don't read it for tomorrow, it may be worth skimming as these things could certainly be issues in some of our designs.

http://jjap.ipap.jp/link?JJAP/43/5209/

Regards,

Adam