Weekend course on “Do-it Right – UVM (DR-UVM)”

0 views
Skip to first unread message

CVC Career

unread,
Mar 20, 2012, 7:15:37 AM3/20/12
to vlsi_questions
Weekend course on “Do-it Right – UVM (DR-UVM)”
…SystemVerilog framework for creating effective Verification
Environment

CVC (www.cvcblr.com) is announcing a new session of its 3-days course
on “Do-it Right – UVM (DR-UVM)” - a step-by-step guide to building
scalable, reusable and flexible Verification Environment using the
industry standard Verification Methodology.

Contents: http://www.cvcblr.com/trng_profiles/Do-it-Right-UVM.pdf
More at http://www.cvcblr.com/trainings
Duration
3- days
The course is structured in a balanced manner with theory and lab
sessions tightly embedded in a manner that helps in mastering topics
learned so far in the course.
Schedule:
Starting on 23rd March, 2012 at Bangalore
To attend this class, confirm your registration by sending an email to
training @ cvcblr.com
Ph: +91-9620209226, +91-80-42134156
Please include the following details in your email:
Name:
Company Name:
Contact Email ID:
Contact Number:

Reply all
Reply to author
Forward
0 new messages