hi every one, iam vamsi,
iam doing project called ethernet, my problem is, we need to transmit
128 bit data in 4 clock pluse, i mean for each clock pluse 32 bit data
has to trasmit. (in ethernet mac receiver transmits 128 bit data to
host in 4 clock pluse, and data should not be greater than 32 bit for
1 clock pluse). iam doing this project in verilog. if any body know
the logic behind it please send me at
pinnak...@gmail.com
regards
vamsi krishna pinnaka