Verilog Code For Sine Wave

[sunildrak]

Hi Sir,

How to write verilog Code For Generating Sine Wave ? I heard about
cordic algorithm ! But does normal simulator like ModelSim support or
view generated waveform ?

[knitish...@gmail.com]

I am also looking for same and if i find sth relevant to this will post it.

[Narveer Yadav]

I got below code from google search. Please try this!

module sine_cos(clk, reset, en, sine, cos);
   input clk, reset, en;
   output [7:0] sine,cos;
   reg [7:0] sine_r, cos_r;
   assign      sine = sine_r + {cos_r[7], cos_r[7], cos_r[7], cos_r[7:3]};
   assign      cos  = cos_r - {sine[7], sine[7], sine[7], sine[7:3]};
   always@(posedge clk or negedge reset)
     begin
         if (!reset) begin
             sine_r <= 0;
             cos_r <= 120;
         end else begin
             if (en) begin
                 sine_r <= sine;
                 cos_r <= cos;
             end
         end
     end
endmodule // sine_cos

--
You received this message because you are subscribed to the Google Groups "VLSI Design Forum" group.
To unsubscribe from this group and stop receiving emails from it, send an email to vlsi-design-fo...@googlegroups.com.
For more options, visit https://groups.google.com/groups/opt_out.

--

Regards,
Narveer Yadav

[gugulothu somulu]

hi, when i run this program using xilinx13.2 i am not getting the sine wave and cosine waves as a output. What should i do to get sine and cosine wave as a output.

  Thanks & Regards 
  Somulu G
  09021235561
 
 


                                      

[sampath reddy]

connect it to CRO ,U CAN observe sine wave