Fwd: Europe & Malaysia Analog Design Opportunity

[Narendra Mane]

---------- Forwarded message ---------
From: <jyoth...@sevitechsystems.com>
Date: Mon, May 13, 2019 at 2:34 AM
Subject: Europe & Malaysia Analog Design Opportunity
To: <jyoth...@sevitechsystems.com>

Hi, 

We have urgent job opportunity for our Firm Sevitech Systems . If you are interested kindly share your CV with Current CTC, Expected CTC & Notice Period.

Website  http://www.sevitechsystems.com/

Glassdoor https://www.glassdoor.co.in/Reviews/SeviTech-Systems-Reviews-E742309.htm

3 Job Descriptions

1. Analog Circuit – High Speed

You will develop Analog Full custom circuit macros, i.e., PLL, Regulators, equalizers, Analog Front End, needed for High Speed PHY IP, in planer and fin-fet CMOS technology.

Technical Attributes

Good grip over CMOS circuit design fundamentals, device physics, control& communication and transmission line theory

Can micro architect circuit from specifications, can create simulation benches to verify the specification, can understand and debug circuit.

Should have basic understanding of layout and parasitic extraction.

Comfortable with spice simulations and various sub-micron designmethodologies;

Understanding of physical design and its impact on design, specifically

in submicron nodes.

Preferred:

Familiarity Multi Gbps range High speed designs and familiarity with such specs.

Familiarity with designs of PLLs, Regulators, Equalizers, Impedance calibrators etc.

Familiarity with automation / Scripting language.

 

·         2. Analog Design - Converters

·         Develop Analog IC design IPs such as Data Converters (A/D, D/A), Phase Locked Loop (PLL), reference circuits with emphasis on high speed applications; Take charge of Key IP developments for analog/mixed-signal IC design projects; Engage with other team members to establish design requirements and IP specifications. Provide technical support to more junior members of the team. Provide technical guidance to layout, application and evaluation teams;

 

 

3. Analog Design – Serdes

Experience with high-speed SerDes block design is a must

Experience with mixed-signal modeling and analysis

Experience with Cadence Design Environment

Experience with Analog/Logic mixed-signal verification

Experience with receiver (Rx) design techniques for high-speed SerDes

Experienced with developing specifications and design documentation

Design activity is for 14nm technology node but experience with 16nm, 10nm is acceptable

Excellent communication skills and ability to work within a tightly-coupled team are a must

 

 

 

 

Thanks & Regards,

Jyothi Mol | Lead -Talent Acquisition |

SeviTech Systems Pvt Ltd

Mobile: 9971699749 | Email: jyoth...@sevitechsystems.com |

Maruti Emerald, Graphite India Main Road, BEML Layout, Brookfield, Bangalore-560066

For more information and exciting opportunities, please visit our website: www.sevitechsystems.com

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Narendra Mane

Analog IC Design Engineer

Delphi Technologies

Phone- (585)-705-1797