If we swap the transistors of an inverter that means NMOS will acts as
pull-up transistor and PMOS acts as pull-down.
So
1. when input is HIGH then PMOS is in cut-off region and NMOS pull-up
output to HIGH state. But output voltage will Vtn( i.e threshold
voltage for NMOS) less than VDD. NMOS is BAD-1 switch.
2. When input is LOW then NMOS is in cut-off region and PMOS pull-down
output to LOW state. But output voltage will Vtp( i.e. threshold
voltage for PMOS) high than VSS. PMOS is BAD-0 switch.
So we have less output voltage swing and less noise margins.
Nmh(Noise margin in HIGH state)= Voh-Vih
Mml(Noise margin in LOW state)= Vil-Vol
Voh= Maximum output voltage available in high state
Vih= Minimum input that can be considered as high
Vil= Maximum input voltage that can be considered as low
Vol= Minimum output voltage available in low state
> <
sonal.aggarwa...@gmail.com>wrote: