On 05/24/2013 06:08 PM, Mikael Patel wrote:
> Great.
>
> Thanks for the patches! I think I understand the bulk of the changes. Extending the prescale table is the most important. I will need to add this to may timer prescale test program.
>
The tables were simply transposed, the one labeled 16bit contained the
8-bit prescaler and vis-versa. I triple-checked the ATtiny85 datasheet,
and the timer0 prescale definitely goes 1, 8, 64, 256, 1024 starting at
001 for no prescaling.
The 0 index in the 8-bit table I added as just a placeholder, because
TCCR0B of 000 actually means "No clock source (Timer/Counter stopped)"
(Table 11-6 in the datasheet). Which is why this should be checked as
an error in the code. It's also different from the main mCU clock
prescaler, which has a different table IIRC.
I'm guessing the 16-bit timer prescaler you have for the 16-bit timer is
correct. I originally wrote it from the AtMega328p datasheet, but it
doesn't hurt to double-check. It's possible I screwd it up or read the
datasheet wrong.
I also think there's a possible race-condition here:
https://github.com/mikaelpatel/Sketchbook/blob/master/VirtualWire/VirtualWire.cpp#L307
The PLL() method that runs from the ISR also modifies this value.
Because there is no synchronization happening between recv() and PLL(),
the value could change unpredictably before or after that line
(depending on when the interrupt fires). This could potentially lead to
an unpredictable state.
Unfortunately, I'm not smart enough to solve the problem or know for
sure if there is one :) My day-job involves much higher-level code, and
more power-hungry chips. In that world, such things involving parallel
processing/threading certainly are a problem, and would need to be
synchronized. I'm just assuming that applies here too.