[vim/vim] filetype: some TI DSP related files are not recognized (PR #15827)
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wzy
Oct 7, 2024, 3:17:22 PM10/7/24
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Problem: some TI DSP related files are not recognized
Solution: recognize some TI DSP related files as their filetypes
You can view, comment on, or merge this pull request online at:
https://github.com/vim/vim/pull/15827
Commit Summary
- d94759e filetype: some TI DSP related files are not recognized
File Changes
(8 files)
- M runtime/filetype.vim (8)
- A runtime/ftplugin/cmd.vim (10)
- A runtime/ftplugin/gel.vim (10)
- A runtime/ftplugin/sa.vim (11)
- A runtime/syntax/cmd.vim (11)
- A runtime/syntax/gel.vim (11)
- A runtime/syntax/sa.vim (11)
- M src/testdir/test_filetype.vim (2)
Patch Links:
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wzy
Oct 7, 2024, 3:19:41 PM10/7/24
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Some example files:
/* ------------------------------------------------------------------------ * * * * evmdm6467_dsp.gel * * Version 0.03 * * * * This GEL file is designed to be used in conjunction with * * CCStudio 3.2+ and the DM646x based EVM. * * * * ------------------------------------------------------------------------ */ /* ------------------------------------------------------------------------ * * * * StartUp( ) * * Setup Memory Map * * * * ------------------------------------------------------------------------ */ StartUp( ) { Setup_Memory_Map( ); } /* ------------------------------------------------------------------------ * * * * OnTargetConnect( ) * * Setup PinMux, Power, PLLs, DDR, & EMIF * * * * ------------------------------------------------------------------------ */ OnTargetConnect( ) { GEL_TextOut( "\nDaVinci HD Startup Sequence\n\n" ); Setup_Cache( ); // Setup L1P/L1D Cache GEL_TextOut( "\nStartup Complete.\n\n" ); } /* ------------------------------------------------------------------------ * * * * OnPreFileLoaded( ) * * This function is called automatically when the 'Load Program' * * Menu item is selected. * * * * ------------------------------------------------------------------------ */ OnPreFileLoaded( ) { /* * GEL_Reset() is used to deal with the worst case scenario of * unknown target state. If for some reason a reset is not desired * upon target connection, GEL_Reset() may be removed and replaced * with something "less brutal" like a cache initialization * function. */ GEL_Reset( ); Disable_VPSS( ); // Disable VPSS GEL_TextOut( "Clear L2 Cache in DDR Range\n" ); GEL_MemoryFill( 0x01848200, 0, 0x40, 0 ); Setup_Cache( ); // Invalidate Cache Disable_EDMA( ); // Disable EDMA IER = 0; // Disable DSP interrupts IFR = 0; GEL_TextOut( "\n" ); } /* ------------------------------------------------------------------------ * * * * OnRestart( ) * * This function is called by CCS when you do Debug->Restart. * * The goal is to put the C6x into a known good state with respect to * * cache, edma and interrupts. * * Failure to do this can cause problems when you restart and * * run your application code multiple times. This is different * * then OnPreFileLoaded() which will do a GEL_Reset() to get the * * C6x into a known good state. * * * * ------------------------------------------------------------------------ */ OnRestart( int nErrorCode ) { /* * Turn off L2 for DDR. The app should manage these for coherency * in the application. Disable L2 cache in the DDR memory space */ GEL_TextOut( "Clear L2 Cache in DDR Range\n" ); GEL_MemoryFill( 0x01848200, 0, 0x40, 0 ); Setup_Cache( ); // Setup Cache Disable_EDMA( ); // Disable EDMA IER = 0; // Disable DSP interrupts IFR = 0; GEL_TextOut( "\n" ); } menuitem "DaVinci EVM Memory Map"; /* ------------------------------------------------------------------------ * * * * Setup_Memory_Map( ) * * Setup the Memory Map for ARM side only. * * * * ------------------------------------------------------------------------ */ hotmenu Setup_Memory_Map( ) { GEL_MapOn( ); GEL_MapReset( ); /* ARM RAM & ROM */ GEL_MapAddStr( 0x10010000, 0, 0x00004000, "R|W|AS4", 0 ); // ARM RAM0 Data GEL_MapAddStr( 0x10014000, 0, 0x00004000, "R|W|AS4", 0 ); // ARM RAM1 Data GEL_MapAddStr( 0x10018000, 0, 0x00008000, "R|AS4", 0 ); // ARM ROM Data /* DSP CFG */ GEL_MapAddStr( 0x01800000, 0, 0x00010000, "R|W|AS4", 0 ); // C64x+ Intr Ctrl GEL_MapAddStr( 0x01810000, 0, 0x00001000, "R|W|AS4", 0 ); // C64x+ Powerdown Ctrl GEL_MapAddStr( 0x01811000, 0, 0x00001000, "R|W|AS4", 0 ); // C64x+ Security ID GEL_MapAddStr( 0x01812000, 0, 0x00001000, "R|W|AS4", 0 ); // C64x+ Revision ID GEL_MapAddStr( 0x01820000, 0, 0x00010000, "R|W|AS4", 0 ); // C64x+ EMC GEL_MapAddStr( 0x01840000, 0, 0x00010000, "R|W|AS4", 0 ); // C64x+ Memory System /* Peripherals */ GEL_MapAddStr( 0x01c00000, 0, 0x00000644, "R|W|AS4", 0 ); // EDMA Channel Ctrl GEL_MapAddStr( 0x01c01000, 0, 0x00000098, "R|W|AS4", 0 ); // EDMA Channel Ctrl GEL_MapAddStr( 0x01c02000, 0, 0x00000098, "R|W|AS4", 0 ); // EDMA Channel Ctrl GEL_MapAddStr( 0x01c02200, 0, 0x00000098, "R|W|AS4", 0 ); // EDMA Channel Ctrl GEL_MapAddStr( 0x01c10000, 0, 0x000003d8, "R|W|AS4", 0 ); // EDMA Transfer Ctrl 0 GEL_MapAddStr( 0x01c10400, 0, 0x000003d8, "R|W|AS4", 0 ); // EDMA Transfer Ctrl 1 GEL_MapAddStr( 0x01c10800, 0, 0x000003d8, "R|W|AS4", 0 ); // EDMA Transfer Ctrl 2 GEL_MapAddStr( 0x01c10c00, 0, 0x000003d8, "R|W|AS4", 0 ); // EDMA Transfer Ctrl 3 GEL_MapAddStr( 0x01c12000, 0, 0x00000400, "R|W|AS4", 0 ); // Video Port GEL_MapAddStr( 0x01c12800, 0, 0x00000800, "R|W|AS4", 0 ); // Graphics Engine GEL_MapAddStr( 0x01c13000, 0, 0x00000400, "R|W|AS4", 0 ); // Stream I/O 0 GEL_MapAddStr( 0x01c13400, 0, 0x00000400, "R|W|AS4", 0 ); // Stream I/O 1 GEL_MapAddStr( 0x01c1a000, 0, 0x00000800, "R|W|AS4", 0 ); // PCI Control GEL_MapAddStr( 0x01c20000, 0, 0x00000060, "R|W|AS4", 0 ); // UART 0 GEL_MapAddStr( 0x01c20400, 0, 0x00000060, "R|W|AS4", 0 ); // UART 1 GEL_MapAddStr( 0x01c20800, 0, 0x00000060, "R|W|AS4", 0 ); // UART 2 GEL_MapAddStr( 0x01c21000, 0, 0x0000003c, "R|W|AS4", 0 ); // I2C GEL_MapAddStr( 0x01c21400, 0, 0x00000028, "R|W|AS4", 0 ); // Timer 0 GEL_MapAddStr( 0x01c21800, 0, 0x00000028, "R|W|AS4", 0 ); // Timer 1 GEL_MapAddStr( 0x01c21c00, 0, 0x0000002c, "R|W|AS4", 0 ); // Timer 2 WDT GEL_MapAddStr( 0x01c22000, 0, 0x0000001c, "R|W|AS4", 0 ); // PWM 0 GEL_MapAddStr( 0x01c22400, 0, 0x0000001c, "R|W|AS4", 0 ); // PWM 1 GEL_MapAddStr( 0x01c26000, 0, 0x00000058, "R|W|AS4", 0 ); // CRGEN0 GEL_MapAddStr( 0x01c26400, 0, 0x00000058, "R|W|AS4", 0 ); // CRGEN1 GEL_MapAddStr( 0x01c40000, 0, 0x00000080, "R|W|AS4", 0 ); // Device System GEL_MapAddStr( 0x01c40400, 0, 0x00000400, "R|W|AS4", 0 ); // Security Controller GEL_MapAddStr( 0x01c40800, 0, 0x00000178, "R|W|AS4", 0 ); // PLL0 GEL_MapAddStr( 0x01c40c00, 0, 0x00000154, "R|W|AS4", 0 ); // PLL1 GEL_MapAddStr( 0x01c41000, 0, 0x00000518, "R|W|AS4", 0 ); // PSC Domain Control GEL_MapAddStr( 0x01c41800, 0, 0x000000b8, "R|W|AS4", 0 ); // PSC Module Status GEL_MapAddStr( 0x01c41a00, 0, 0x000000b8, "R|W|AS4", 0 ); // PSC Module Control GEL_MapAddStr( 0x01c64000, 0, 0x00002000, "R|W|AS4", 0 ); // USB 2.0 GEL_MapAddStr( 0x01c66000, 0, 0x0000007c, "R|W|AS2", 0 ); // ATA GEL_MapAddStr( 0x01c66800, 0, 0x00000068, "R|W|AS4", 0 ); // SPI GEL_MapAddStr( 0x01c67000, 0, 0x00000060, "R|W|AS4", 0 ); // GPIO GEL_MapAddStr( 0x01c67800, 0, 0x00000800, "R|W|AS4", 0 ); // HPI GEL_MapAddStr( 0x01c80000, 0, 0x00000280, "R|W|AS4", 0 ); // EMAC Control GEL_MapAddStr( 0x01c81000, 0, 0x00000078, "R|W|AS4", 0 ); // EMAC Module GEL_MapAddStr( 0x01c82000, 0, 0x00002000, "R|W|AS4", 0 ); // EMAC Module RAM GEL_MapAddStr( 0x01c84000, 0, 0x00000090, "R|W|AS4", 0 ); // MDIO GEL_MapAddStr( 0x01d11000, 0, 0x00001400, "R|W|AS4", 0 ); // MCASP0 GEL_MapAddStr( 0x01d11400, 0, 0x00000400, "R|W|AS4", 0 ); // MCASP0 Data GEL_MapAddStr( 0x01d11800, 0, 0x00000400, "R|W|AS4", 0 ); // MCASP1 GEL_MapAddStr( 0x01d11c00, 0, 0x00000400, "R|W|AS4", 0 ); // MCASP1 Data GEL_MapAddStr( 0x02000000, 0, 0x00200000, "R|W|AS4", 0 ); // HD-VICP0 GEL_MapAddStr( 0x02200000, 0, 0x00200000, "R|W|AS4", 0 ); // HD-VICP1 /* HD-VICP0 */ GEL_MapAddStr( 0x00400000, 0, 0x00100000, "R|W|AS4", 0 ); // HD-VICP0 GEL_MapAddStr( 0x11400000, 0, 0x00100000, "R|W|AS4", 0 ); // HD-VICP0 GEL_MapAddStr( 0x40400000, 0, 0x00040000, "R|W|AS4", 0 ); // HD-VICP0 R/W Port GEL_MapAddStr( 0x40440000, 0, 0x00040000, "R|W|AS4", 0 ); // HD-VICP0 R-Only Port GEL_MapAddStr( 0x40480000, 0, 0x00040000, "R|W|AS4", 0 ); // HD-VICP0 W-Only Port /* HD-VICP1 */ GEL_MapAddStr( 0x00600000, 0, 0x00100000, "R|W|AS4", 0 ); // HD-VICP1 GEL_MapAddStr( 0x11600000, 0, 0x00100000, "R|W|AS4", 0 ); // HD-VICP1 GEL_MapAddStr( 0x40600000, 0, 0x00040000, "R|W|AS4", 0 ); // HD-VICP1 R/W Port GEL_MapAddStr( 0x40640000, 0, 0x00040000, "R|W|AS4", 0 ); // HD-VICP1 R-Only Port GEL_MapAddStr( 0x40680000, 0, 0x00040000, "R|W|AS4", 0 ); // HD-VICP1 W-Only Port /* DSP RAM */ GEL_MapAddStr( 0x00818000, 0, 0x00020000, "R|W|AS4", 0 ); // DSP L2 RAM/Cache GEL_MapAddStr( 0x00e00000, 0, 0x00008000, "R|W|AS4", 0 ); // DSP L1P Cache/RAM GEL_MapAddStr( 0x00f00000, 0, 0x00008000, "R|W|AS4", 0 ); // DSP L1D Cache/RAM GEL_MapAddStr( 0x11818000, 0, 0x00020000, "R|W|AS4", 0 ); // DSP L2 RAM/Cache GEL_MapAddStr( 0x11e00000, 0, 0x00008000, "R|W|AS4", 0 ); // DSP L1P Cache/RAM GEL_MapAddStr( 0x11f00000, 0, 0x00008000, "R|W|AS4", 0 ); // DSP L1D Cache/RAM /* DDR2 */ GEL_MapAddStr( 0x20000000, 0, 0x000000f4, "R|W|AS4", 0 ); // DDR2 Control GEL_MapAddStr( 0x80000000, 0, 0x40000000, "R|W|AS4", 0 ); // DDR2 SDRAM /* EMIFA */ GEL_MapAddStr( 0x20008000, 0, 0x00000080, "R|W|AS4", 0 ); // EMIFA Control GEL_MapAddStr( 0x42000000, 0, 0x02000000, "R|W|AS4", 0 ); // AEMIF CS2 GEL_MapAddStr( 0x44000000, 0, 0x02000000, "R|W|AS4", 0 ); // AEMIF CS3 GEL_MapAddStr( 0x46000000, 0, 0x02000000, "R|W|AS4", 0 ); // AEMIF CS4 GEL_MapAddStr( 0x48000000, 0, 0x02000000, "R|W|AS4", 0 ); // AEMIF CS5 /* VLYNQ */ GEL_MapAddStr( 0x20010000, 0, 0x00000048, "R|W|AS4", 0 ); // VLYNQ Control //GEL_MapAddStr( 0x20010080, 0, 0x00000068, "R|W|AS4", 0 ); // VLYNQ Control Remote GEL_MapAddStr( 0x4c000000, 0, 0x04000000, "R|W|AS4", 0 ); // VLYNQ Remote Devices /* PCI */ GEL_MapAddStr( 0x30000000, 0, 0x10000000, "R|W|AS4", 0 ); // PCI Address Space } /* ------------------------------------------------------------------------ * * * * Clear_Memory_Map( ) * * Clear the Memory Map * * * * ------------------------------------------------------------------------ */ hotmenu Clear_Memory_Map( ) { GEL_MapOff( ); GEL_MapReset( ); } menuitem "DaVinci HD Functions"; /* ------------------------------------------------------------------------ * * * * Setup_Cache( ) * * Invalidate old cache and setup cache for operation * * * * ------------------------------------------------------------------------ */ hotmenu Setup_Cache( ) { int l1p, l1d, l2; GEL_TextOut( "Setup Cache " ); #define CACHE_L2CFG *( unsigned int* )( 0x01840000 ) #define CACHE_L2INV *( unsigned int* )( 0x01845008 ) #define CACHE_L1PCFG *( unsigned int* )( 0x01840020 ) #define CACHE_L1PINV *( unsigned int* )( 0x01845028 ) #define CACHE_L1DCFG *( unsigned int* )( 0x01840040 ) #define CACHE_L1DINV *( unsigned int* )( 0x01845048 ) CACHE_L1PINV = 1; // L1P invalidated CACHE_L1PCFG = 7; // L1P on, MAX size CACHE_L1DINV = 1; // L1D invalidated CACHE_L1DCFG = 7; // L1D on, MAX size CACHE_L2INV = 1; // L2 invalidated CACHE_L2CFG = 0; // L2 off, use as RAM l1p = CACHE_L1PCFG; if ( l1p == 0 ) GEL_TextOut( "(L1P = 0K) + " ); if ( l1p == 1 ) GEL_TextOut( "(L1P = 4K) + " ); if ( l1p == 2 ) GEL_TextOut( "(L1P = 8K) + " ); if ( l1p == 3 ) GEL_TextOut( "(L1P = 16K) + " ); if ( l1p >= 4 ) GEL_TextOut( "(L1P = 32K) + " ); l1d = CACHE_L1DCFG; if ( l1d == 0 ) GEL_TextOut( "(L1D = 0K) + " ); if ( l1d == 1 ) GEL_TextOut( "(L1D = 4K) + " ); if ( l1d == 2 ) GEL_TextOut( "(L1D = 8K) + " ); if ( l1d == 3 ) GEL_TextOut( "(L1D = 16K) + " ); if ( l1d >= 4 ) GEL_TextOut( "(L1D = 32K) + " ); l2 = CACHE_L2CFG; if ( l2 == 0 ) GEL_TextOut( "(L2 = ALL SRAM)... " ); else if ( l2 == 1 ) GEL_TextOut( "(L2 = 31/32 SRAM)... " ); else if ( l2 == 2 ) GEL_TextOut( "(L2 = 15/16 SRAM)... " ); else if ( l2 == 3 ) GEL_TextOut( "(L2 = 7/8 SRAM)... " ); else if ( l2 == 7 ) GEL_TextOut( "(L2 = 3/4 SRAM)... " ); GEL_TextOut( "[Done]\n" ); } /* ------------------------------------------------------------------------ * * * * Disable_VPSS( ) * * Disable VPFE & VPBE * * * * ------------------------------------------------------------------------ */ Disable_VPSS( ) { #define VPIF_CHCTRL0 *( unsigned int* )( 0x01c12004 ) #define VPIF_CHCTRL1 *( unsigned int* )( 0x01c12008 ) #define VPIF_CHCTRL2 *( unsigned int* )( 0x01c1200c ) #define VPIF_CHCTRL3 *( unsigned int* )( 0x01c12010 ) #define VPIF_INTEN *( unsigned int* )( 0x01c12020 ) #define VPIF_INTENCLR *( unsigned int* )( 0x01c12028 ) GEL_TextOut( "Disable VPSS\n" ); VPIF_CHCTRL0 = 0; VPIF_CHCTRL1 = 0; VPIF_CHCTRL2 = 0; VPIF_CHCTRL3 = 0; VPIF_INTEN = 0; VPIF_INTENCLR = 0x0f; /* Clear Channels */ //GEL_MemoryFill( 0x01c12040, 0, 104, 0 ); // Channel 0-3 } /* ------------------------------------------------------------------------ * * * * Disable_EDMA( ) * * Disable EDMA events and interrupts, clear any pending events * * * * ------------------------------------------------------------------------ */ Disable_EDMA( ) { #define EDMA_3CC_IECRH *( int* )( 0x01C0105C ) #define EDMA_3CC_EECRH *( int* )( 0x01C0102C ) #define EDMA_3CC_ICRH *( int* )( 0x01C01074 ) #define EDMA_3CC_ECRH *( int* )( 0x01C0100C ) #define EDMA_3CC_IECR *( int* )( 0x01C01058 ) #define EDMA_3CC_EECR *( int* )( 0x01C01028 ) #define EDMA_3CC_ICR *( int* )( 0x01C01070 ) #define EDMA_3CC_ECR *( int* )( 0x01C01008 ) GEL_TextOut( "Disable EDMA events\n" ); EDMA_3CC_IECRH = 0xFFFFFFFF; // IERH ( disable high interrupts ) EDMA_3CC_EECRH = 0xFFFFFFFF; // EERH ( disable high events ) EDMA_3CC_ICRH = 0xFFFFFFFF; // ICRH ( clear high interrupts ) EDMA_3CC_ECRH = 0xFFFFFFFF; // ICRH ( clear high events ) EDMA_3CC_IECR = 0xFFFFFFFF; // IER ( disable low interrupts ) EDMA_3CC_EECR = 0xFFFFFFFF; // EER ( disable low events ) EDMA_3CC_ICR = 0xFFFFFFFF; // ICR ( clear low interrupts ) EDMA_3CC_ECR = 0xFFFFFFFF; // ICRH ( clear low events ) }
;* ================================================================================================ *; ;* bitstream-a.sa: bitstream for TI C6000 DSP *; ;* *; ;* -------------------------------------------------------------------------------------------- *; ;* | cpu cost table of bitstream on DM6467 simulator | *; ;* |------------------------------------------------------------------------------------------| *; ;* | Function | Optimized cost (cycles) | Pure C cost (cycles) | Result | *; ;* | |-------------------------|-------------------------|-------------------| *; ;* | | Debug | Release | Debug | Release | Debug | Release | *; ;* |------------------|------------|------------|------------|------------|---------|---------| *; ;* | x264_nal_escape | 10026 D1 | 6465 D1 | 112589 D1 | 99192 D1 | 11.2 | 15.3 | *; ;* -------------------------------------------------------------------------------------------- *; ;* *; ;* ================================================================================================ *; ;* ======================================================================== *; ;* x264_nal_escape_ti -- nal escape *; ;* ======================================================================== *; .sect ".text:_x264_nal_escape_ti" .global _x264_nal_escape_ti _x264_nal_escape_ti .cproc dst, src, end .no_mdep .reg src_7654:src_3210 .reg src_FEDC:src_BA98 .reg eq0_3210, eq0_7654, eq0_BA98, eq0_FEDC .reg lt4_3210, lt4_7654, lt4_BA98, lt4_FEDC .reg eq0, eq0_hi, eq0_lo .reg lt4, lt4_hi, lt4_lo .reg src_0, src_1, src_2, src_3, bak_0, bak_1, src_x4 .reg con_x16, con_x4, con_x1 .reg num, num_x1, num_x16, k_0, k_4, k_3, k_FF, i, j, k ZERO k_0 MVKL 0x04040404, k_4 MVKH 0x04040404, k_4 MVK 0x03, k_3 MVK 0xFF, k_FF ZERO bak_0 ZERO bak_1 SUB end, src, num SHR num, 4, num_x16 AND 15, num, num_x1 [!num_x16] B loop_nal_escape_x1_bgn ; process 16 bytes each time loop_nal_escape_x16_bgn: SUB num_x16, 1, i loop_nal_escape_x16: LDNDW *src++, src_7654:src_3210 LDNDW *src++, src_FEDC:src_BA98 CMPEQ4 src_3210, k_0, eq0_3210 CMPEQ4 src_7654, k_0, eq0_7654 CMPEQ4 src_BA98, k_0, eq0_BA98 CMPEQ4 src_FEDC, k_0, eq0_FEDC CMPLTU4 src_3210, k_4, lt4_3210 CMPLTU4 src_7654, k_4, lt4_7654 CMPLTU4 src_BA98, k_4, lt4_BA98 CMPLTU4 src_FEDC, k_4, lt4_FEDC SHL eq0_7654, 4, eq0_7654 SHL lt4_7654, 4, lt4_7654 SHL eq0_BA98, 8, eq0_BA98 SHL lt4_BA98, 8, lt4_BA98 SHL eq0_FEDC, 12, eq0_FEDC SHL lt4_FEDC, 12, lt4_FEDC OR eq0_7654, eq0_3210, eq0_lo OR lt4_7654, lt4_3210, lt4_lo OR eq0_FEDC, eq0_BA98, eq0_hi OR lt4_FEDC, lt4_BA98, lt4_hi OR eq0_hi, eq0_lo, eq0 OR lt4_hi, lt4_lo, lt4 ; combine condition: src[0] == 0 && src[1] == 0 && src[2] <= 0x03 SHL eq0, 2, src_0 SHL eq0, 1, src_1 OR src_0, bak_0, src_0 OR src_1, bak_1, src_1 SHRU eq0, 14, bak_0 SHRU eq0, 15, bak_1 AND src_0, src_1, con_x16 AND con_x16, lt4, con_x16 [con_x16] B loop_nal_escape_x16_con STNDW src_7654:src_3210, *dst++ STNDW src_FEDC:src_BA98, *dst++ [i] BDEC loop_nal_escape_x16, i B loop_nal_escape_x1_bgn loop_nal_escape_x16_con: AND 15, con_x16, con_x4 MV src_3210, src_x4 MVK 3, j loop_nal_escape_x4: [!con_x4] B loop_nal_escape_x4_0 SHRU src_x4, 8, src_1 SHRU src_x4, 16, src_2 SHRU src_x4, 24, src_3 AND src_x4, k_FF, src_0 AND src_1, k_FF, src_1 AND src_2, k_FF, src_2 AND src_3, k_FF, src_3 AND 9, con_x4, k ; 0x09(1001), 0x0F(1111) CMPEQ k, 9, k [k] B loop_nal_escape_x4_9 AND 1, con_x4, k ; 0x01(0001), 0x03(0011), 0x07(0111) [k] B loop_nal_escape_x4_1 AND 2, con_x4, k ; 0x02(0010), 0x06(0110), 0x0E(1110) [k] B loop_nal_escape_x4_2 AND 4, con_x4, k ; 0x04(0100), 0x0C(1100) [k] B loop_nal_escape_x4_4 B loop_nal_escape_x4_8 ; 0x08(1000) ; insert byte: 0x03 if necessary loop_nal_escape_x4_9: STB k_3, *dst++ STB src_0, *dst++ STB src_1, *dst++ STB src_2, *dst++ STB k_3, *dst++ STB src_3, *dst++ B loop_nal_escape_x4_end loop_nal_escape_x4_1: STB k_3, *dst++ STNW src_x4, *dst++ B loop_nal_escape_x4_end loop_nal_escape_x4_2: STB src_0, *dst++ STB k_3, *dst++ STB src_1, *dst++ STB src_2, *dst++ STB src_3, *dst++ B loop_nal_escape_x4_end loop_nal_escape_x4_4: STB src_0, *dst++ STB src_1, *dst++ STB k_3, *dst++ STB src_2, *dst++ STB src_3, *dst++ B loop_nal_escape_x4_end loop_nal_escape_x4_8: STB src_0, *dst++ STB src_1, *dst++ STB src_2, *dst++ STB k_3, *dst++ STB src_3, *dst++ B loop_nal_escape_x4_end loop_nal_escape_x4_0: STNW src_x4, *dst++ loop_nal_escape_x4_end: SHRU con_x16, 4, con_x16 AND 15, con_x16, con_x4 CMPEQ j, 3, k [k] B loop_nal_escape_x4_end_3 CMPEQ j, 2, k [k] B loop_nal_escape_x4_end_2 CMPEQ j, 1, k [k] B loop_nal_escape_x4_end_1 B loop_nal_escape_x16_end loop_nal_escape_x4_end_3: MV src_7654, src_x4 [j] BDEC loop_nal_escape_x4, j loop_nal_escape_x4_end_2: MV src_BA98, src_x4 [j] BDEC loop_nal_escape_x4, j loop_nal_escape_x4_end_1: MV src_FEDC, src_x4 [j] BDEC loop_nal_escape_x4, j loop_nal_escape_x16_end: [i] BDEC loop_nal_escape_x16, i ; process last bytes one by one loop_nal_escape_x1_bgn: [!num_x1] B loop_nal_escape_end SUB num_x1, 1, i loop_nal_escape_x1: LDB *src++, src_0 CMPEQ src_0, k_0, eq0 CMPLTU src_0, k_4, lt4 AND bak_0, bak_1, con_x1 AND con_x1, lt4, con_x1 MV bak_1, bak_0 MV eq0, bak_1 [!con_x1] B loop_nal_escape_x1_end STB k_3, *dst++ loop_nal_escape_x1_end: STB src_0, *dst++ [i] BDEC loop_nal_escape_x1, i loop_nal_escape_end: .return dst .endproc
/****************************************************************************/
/* DM6467.cmd */
/* Copyright (c) 2009 Texas Instruments Incorporated */
/* Author: Rafael de Souza */
/* */
/* Description: This file is a sample linker command file that can be */
/* used for linking programs built with the C compiler and */
/* running the resulting .out file on a DM6467. */
/* Use it as a guideline. You will want to */
/* change the memory layout to match your specific */
/* target system. You may want to change the allocation */
/* scheme according to the size of your program. */
/* */
/****************************************************************************/
MEMORY
{
#ifndef DSP_CORE /* ARM exclusive memory regions */
ARM_IRAM: o = 0x00000000 l = 0x00008000 /* 32kB Internal ARM instruction RAM */
ARM_IROM: o = 0x00008000 l = 0x00008000 /* 32kB Internal ARM instruction ROM */
ARM_DRAM: o = 0x00010000 l = 0x00008000 /* 32kB Internal ARM data RAM */
ARM_DROM: o = 0x00018000 l = 0x00008000 /* 32kB Internal ARM data ROM */
#endif
#ifdef DSP_CORE /* DSP exclusive memory regions */
DSP_L2: o = 0x00818000 l = 0x00020000 /* 128kB DSP L2 RAM/CACHE */
DSP_L1P: o = 0x00E00000 l = 0x00008000 /* 32kB DSP L1 Program RAM/CACHE */
DSP_L1D: o = 0x00F00000 l = 0x00008000 /* 32kB DSP L1 Data RAM/CACHE */
SH_ARM_DRAM: o = 0x10010000 l = 0x00008000 /* 32kB Shared Internal ARM data RAM */
SH_ARM_DROM: o = 0x10018000 l = 0x00008000 /* 32kB Shared Internal ARM data ROM */
#endif
SH_DSP_L2: o = 0x11818000 l = 0x00020000 /* 128kB Shared DSP L2 RAM/CACHE */
SH_DSP_L1P: o = 0x11E00000 l = 0x00008000 /* 32kB Shared DSP L1 Program RAM/CACHE */
SH_DSP_L1D: o = 0x11F00000 l = 0x00008000 /* 32kB Shared DSP L1 Data RAM/CACHE */
PCI_DATA: o = 0x30000000 l = 0x10000000 /* 256MB PCI Data */
EMIFA_CS2: o = 0x42000000 l = 0x02000000 /* 32MB EMIFA CS2 */
EMIFA_CS3: o = 0x44000000 l = 0x02000000 /* 32MB EMIFA CS3 */
EMIFA_CS4: o = 0x46000000 l = 0x02000000 /* 32MB EMIFA CS4 */
EMIFA_CS5: o = 0x48000000 l = 0x02000000 /* 32MB EMIFA CS5 */
VLYNQ_DATA: o = 0x4C000000 l = 0x04000000 /* 64MB VLYNQ data */
DDR2: o = 0x80000000 l = 0x20000000 /* 512MB of external DDR */
}
SECTIONS
{
.text > DDR2
.stack > DDR2
.bss > DDR2
.cio > DDR2
.const > DDR2
.data > DDR2
.switch > DDR2
.sysmem > DDR2
.far > DDR2
.args > DDR2
.ppinfo > DDR2
.ppdata > DDR2
/* TI-ABI or COFF sections */
.pinit > DDR2
.cinit > DDR2
/* EABI sections */
.binit > DDR2
.init_array > DDR2
.neardata > DDR2
.fardata > DDR2
.rodata > DDR2
.c6xabi.exidx > DDR2
.c6xabi.extab > DDR2
}
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Christian Brabandt
Oct 8, 2024, 3:57:36 PM10/8/24
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@chrisbra commented on this pull request.
I find those filetypes all a bit arbitrary. Can't you use tigel, tiasm, tild or something similar?
> au BufNewFile,BufRead *.cmd - \ if getline(1) =~ '^/\*' | setf rexx | else | setf dosbatch | endif + \ if getline(1) =~ '/\*\s\+\S\+\.cmd' | setf cmd | elseif getline(1) =~ '^/\*' | setf rexx | else | setf dosbatch | endif
Your example file has the script name on line 2. Also I find this is a strange condition to detect TI DSP file. I can imagine that batch-scripts may also have similar comments which may match *.cmd. Also I find cmd as filetype a bit too generic. How does this related to "TI Linker"?
> @@ -0,0 +1,11 @@
+" Vim syntax file
+" Language: TI DSP linker command file
+
+if exists("b:current_syntax")
+ finish
+endif
+
+" TODO: support C macro defines
+setlocal syntax=ld
use runtime! syntax/ld.vim
> @@ -0,0 +1,11 @@
+" Vim syntax file
+" Language: TI DSP gel
+
+if exists("b:current_syntax")
+ finish
+endif
+
+" TODO: support gel specific keywords
+setlocal syntax=c
same here
> @@ -0,0 +1,11 @@
+" Vim syntax file
+" Language: TI DSP gel
+
+if exists("b:current_syntax")
+ finish
+endif
+
+" TODO: support gel specific keywords
+setlocal syntax=c
+
+let b:current_syntax = "cmd"
is that intentionally set to cmd?
> @@ -0,0 +1,11 @@
+" Vim syntax file
+" Language: TI linear assembly language
+
+if exists("b:current_syntax")
+ finish
+endif
+
+" TODO: not same asm, just better than none
+setlocal syntax=asm
+
+let b:current_syntax = "cmd"
is that intentionally set to cmd?
> @@ -0,0 +1,11 @@
+" Vim syntax file
+" Language: TI linear assembly language
+
+if exists("b:current_syntax")
+ finish
+endif
+
+" TODO: not same asm, just better than none
+setlocal syntax=asm
runtime! syntax/asm.vim
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wzy
Oct 21, 2024, 1:02:34 PM10/21/24
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@Freed-Wu commented on this pull request.
> au BufNewFile,BufRead *.cmd - \ if getline(1) =~ '^/\*' | setf rexx | else | setf dosbatch | endif + \ if getline(1) =~ '/\*\s\+\S\+\.cmd' | setf cmd | elseif getline(1) =~ '^/\*' | setf rexx | else | setf dosbatch | endif
dosbatch will not use /* XXX.cmd because /* XXX */ is comment of tild.
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wzy
Oct 21, 2024, 1:10:48 PM10/21/24
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@Freed-Wu pushed 1 commit.
- 607b79e filetype: some TI DSP related files are not recognized
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Christian Brabandt
Oct 21, 2024, 4:06:21 PM10/21/24
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Thanks. Can you please change the Maintainer line to yourself?
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Christian Brabandt
Nov 14, 2024, 5:06:30 PM11/14/24
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Thanks, can you please include a new context aware test for *.sa files? And remove the duplicate Maintainer line?
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wzy
Nov 14, 2024, 8:29:49 PM11/14/24
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Can FTsa() be context-aware?
Delete which file's line?
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Christian Brabandt
Nov 18, 2024, 3:55:13 PM11/18/24
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Can you please add yourself to the MAINTAINERS file? Also I believe the test still fails.
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Christian Brabandt
Nov 18, 2024, 3:55:28 PM11/18/24
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@chrisbra commented on this pull request.
In runtime/ftplugin/tigel.vim:
> @@ -0,0 +1,13 @@ +" Vim filetype plugin file +" Language: TI DSP gel +" Maintainer: The Vim Project <https://github.com/vim/vim>
delete this line please
> @@ -0,0 +1,13 @@ +" Vim filetype plugin file +" Language: TI linear assembly language +" Maintainer: The Vim Project <https://github.com/vim/vim>
and this one
> @@ -0,0 +1,13 @@ +" Vim filetype plugin file +" Language: TI DSP linker command file +" Maintainer: The Vim Project <https://github.com/vim/vim>
and this one
> @@ -0,0 +1,14 @@ +" Vim syntax file +" Language: TI DSP gel +" Maintainer: The Vim Project <https://github.com/vim/vim>
and this
> @@ -0,0 +1,14 @@ +" Vim syntax file +" Language: TI DSP linker command file +" Maintainer: The Vim Project <https://github.com/vim/vim>
and this
> @@ -0,0 +1,14 @@ +" Vim syntax file +" Language: TI linear assembly language +" Maintainer: The Vim Project <https://github.com/vim/vim>
and this
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Christian Brabandt
Nov 19, 2024, 8:17:03 AM11/19/24
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Still some errors:
From test_filetype.vim:
Found errors in Test_sa_type():
command line..script /home/runner/work/vim/vim/src/testdir/runtest.vim[613]..function RunTheTest[57]..Test_sa_type[6]..BufRead Autocommands for "*": Expected 0 but got 1
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wzy
Nov 19, 2024, 9:16:15 AM11/19/24
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Is this new added test right?
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zeertzjq
Nov 19, 2024, 9:48:12 AM11/19/24
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@zeertzjq commented on this pull request.
In src/testdir/test_filetype.vim:
> @@ -659,7 +660,6 @@ def s:GetFilenameChecks(): dict<list<string>>
samba: ['smb.conf'],
sas: ['file.sas'],
sass: ['file.sass'],
- sather: ['file.sa'],
Does this line have to be removed? I think it will work fine.
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zeertzjq
Nov 19, 2024, 9:53:46 AM11/19/24
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@zeertzjq commented on this pull request.
In runtime/autoload/dist/ft.vim:
> @@ -994,6 +994,14 @@ export def SQL() endif enddef +export def FTsa() + if getline(1) =~# ';\*'
Is checking the first line enough?
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Christian Brabandt
Nov 19, 2024, 2:51:44 PM11/19/24
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@chrisbra commented on this pull request.
In runtime/autoload/dist/ft.vim:
> @@ -994,6 +994,14 @@ export def SQL() endif enddef +export def FTsa() + if getline(1) .. getline(2) .. getline(3) .. getline(4) =~# ';\*'⬇️ Suggested change
- if getline(1) .. getline(2) .. getline(3) .. getline(4) =~# ';\*' + if join(getline(1, 4), '') =~# ';\*'
In src/testdir/test_filetype.vim:
> @@ -659,7 +660,7 @@ def s:GetFilenameChecks(): dict<list<string>>
samba: ['smb.conf'],
sas: ['file.sas'],
sass: ['file.sass'],
- sather: ['file.sa'],
+ sather: ['file.sather'],
In filetype.vim, we are only detecting *.sa files as potential sather filetype. Did you mean to add a file pattern *.sather as well?
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Christian Brabandt
Nov 19, 2024, 2:51:58 PM11/19/24
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Is this new added test right?
Not yet :(
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wzy
Dec 9, 2024, 1:19:18 PM12/9/24
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Maybe we should rename *.sa's filetype from tisa to linearasm. some cmake/meson contributor want to use ASM_LINEAR, linearasm.
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Christian Brabandt
Dec 9, 2024, 1:56:33 PM12/9/24
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sorry I don't understand
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Christian Brabandt
Dec 25, 2024, 4:42:23 AM12/25/24
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still some failures
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wzy
Dec 28, 2024, 7:23:43 AM12/28/24
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I am using TI DSP to do some embedded development
and use meson as build system and vim as editor. So I hope I can own syntax highlight for some related filetypes.
In order to review easily, I split it as many small PRs:
- gel: TI Code Composer Studio General Extension Language #16226
- lnk: TI linker command file #16320
- linkermap: TI linker map file #16324
- linearasm: TI C6000 linear assembly #15827
some are drafts now.
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Christian Brabandt
Dec 29, 2024, 9:41:01 AM12/29/24
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still some test failures
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zeertzjq
Dec 29, 2024, 10:09:47 AM12/29/24
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@zeertzjq commented on this pull request.
In src/testdir/test_filetype.vim:
> @@ -2310,6 +2309,16 @@ func Test_cls_file()
filetype off
endfunc
+func Test_sa_file()
+ filetype on
+ call writefile([';* XXX-a.sa: XXX for TI C6000 DSP *;', '.no_mdep'], 'Xfile.sa')
+ split Xfile.sa
+ call assert_equal('linearasm', &filetype)
+
The sather fallback is not tested
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zeertzjq
Dec 29, 2024, 10:09:56 AM12/29/24
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@zeertzjq commented on this pull request.
In runtime/autoload/dist/ft.vim:
> @@ -1003,6 +1003,14 @@ export def SQL() endif enddef +export def FTsa() + if join(getline(1, 4), '') =~# ';\*' + setf linearsam⬇️ Suggested change
- setf linearsam + setf linearasm
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wzy
Dec 29, 2024, 10:59:15 AM12/29/24
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@Freed-Wu pushed 1 commit.
- addb3e5 filetype: TI linear assembly files are not recognized
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zeertzjq
Dec 29, 2024, 11:11:54 AM12/29/24
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@zeertzjq commented on this pull request.
In src/testdir/test_filetype.vim:
> @@ -2309,6 +2308,21 @@ func Test_cls_file()
filetype off
endfunc
+func Test_sa_file()
+ filetype on
+
+ call writefile([';* XXX-a.sa: XXX for TI C6000 DSP *;', '.no_mdep'], 'Xfile.sa')
+ split Xfile.sa
+ call assert_equal('linearasm', &filetype)
+
⬇️ Suggested change
- + bwipe!
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wzy
Dec 29, 2024, 11:20:27 AM12/29/24
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@Freed-Wu pushed 1 commit.
- 3e200d1 filetype: TI linear assembly files are not recognized
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Christian Brabandt
Jan 7, 2025, 2:37:36 PM1/7/25
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so this is now ready? Please remove the DRAFT label then.
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Christian Brabandt
Jan 8, 2025, 2:28:53 PM1/8/25
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zeertzjq
Jan 9, 2025, 3:16:59 AM1/9/25
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@zeertzjq commented on this pull request.
> + hi def link tiasmDecimal Number + hi def link tiasmOctal Number + hi def link tiasmBinary Number +endif +hi def link tiasmFloat Float + +hi def link tiasmString String +hi def link tiasmStringEscape Special +hi def link tiasmCharacter Character +hi def link tiasmCharacterEscape Special + +hi def link tiasmIdentifier Identifier +hi def link tiasmType Type +hi def link tiasmFunction Function + +let b:current_syntax = "lineartiasm"
Should this be changed to tiasm now?
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wzy
Jan 9, 2025, 4:27:20 AM1/9/25
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@Freed-Wu commented on this pull request.
> + hi def link tiasmDecimal Number + hi def link tiasmOctal Number + hi def link tiasmBinary Number +endif +hi def link tiasmFloat Float + +hi def link tiasmString String +hi def link tiasmStringEscape Special +hi def link tiasmCharacter Character +hi def link tiasmCharacterEscape Special + +hi def link tiasmIdentifier Identifier +hi def link tiasmType Type +hi def link tiasmFunction Function + +let b:current_syntax = "lineartiasm"
My typo. linear assemble is just a special type of TI asm, which use same syntax highlight.
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