verible formatter query about single line to multiline formatting control

[Shaun chua]

Hi Verible Community, 

I have this scenario where a single line got formatted into a multiline. Any suggestions on how can I control the tool to make it format it in a nicer way? Thanks.

Original code:

std::randomize(data_temp[i]) with { data_temp[i] inside {8'h0, 8'hff, 8'haa,8'h55,8'hcc,8'he1};};

Formatted code:

 std::randomize(
          data_temp[i]
      ) with {
        data_temp[i] inside {8'h0, 8'hff, 8'haa, 8'h55, 8'hcc, 8'he1};
      };

[David Fang]

The formatter is far from perfect, so if you need to disable it over ranges of lines, use:

```

// verilog_format: off

// verilog_format: on

```

See https://github.com/chipsalliance/verible/blob/master/verilog/tools/formatter/README.md#disabling-formatting-disable-formatting

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