Fwd: FW: ASIC-PD job openings : Please refer...

[Mounica Paruchuri]

Openings in nvidia through employee  referral.

Hi All,

 

We have two very exciting openings to join our India-ASIC-PD methodology team.

 

Both are senior positions and a broad outline is as below,

-       Req# 1874470

ASIC-PD Flow Automation Developer will develop software tools for NVIDIA's Timing Closure flows. 
These flows handle the automation of the timing closure and physical design of our large scale integrated circuits. 
A strong knowledge of object oriented programming in object oriented Perl and C++ is desired to take the tools to the next generation.
Knowledge of timing closure, digital design, gate level Verilog netlist structures, and physical design concepts is required.
This role will require interaction with project teams to support and improve the flow, and to provide regression and validation tests

-       Req# 1887409

As a member of our ASIC backend/timing team, you'll be working on product designs, focusing on such tasks as clocks/timing convergence/chip layout planning and scripting of flows. Specifically you'll be focusing on methodology associated with full chip layout planning (partitioning, planning clock distribution), full chip timing closure (using primetime for example) .In this role you will also interface with core physical design teams and custom design teams to drive timing analysis/closure all the way from micro-architecture to tape-out.