Your gcc is designed by default to compile things that work with a
wide variety of ARM chips. V8 should work even with these pessimistic
assumptions, but you can't compile the VM in Thumb mode on such an old
chip. But as you note below you can use the -march flag to compile
for newer CPUs if you know you won't be running on such old hardware.
> The patch you gave me didnt change the compile errors.
> I really don't know about ARM Instruction Set versions, but I hope
> this might help you to fix a potential bug.
>
> Actually my problem is not to compile on the board itself, but rather
> to be sure that my tests results are accurate and it could be solved
> more easily if can you confirm me I can trust the cross-compiled shell
> obtained the following way:
>
> 1) Modifying the v8 SConstruct adding 'CCFLAGS': ['-
> march=armv7-a'] to the arm architecture (line 162)
> 2) Exporting my environment variables CC, CXX, AR, AS, RANLIB, LD to
> my CodeSourcery crosstools (arm-none-linux-gnueabi-gcc , etc)
> 3) Cross-compiling with scons arch=arm sample=shell
> 4) Running the cross-compiled shell on my cpu
That sounds fine and should give you a VM that works. To be certain,
there are some tests that are bundled with the VM source that you can
run with the test.py script. See
http://code.google.com/p/v8/wiki/Testing At the moment we pass all
tests on ARM apart from some debug tests. There's a way to tell
test.py to use the ARM test expectations, but I can't remember it
right now.
The code generator for ARM is not as advanced as the one for Intel.
My very rough guess is that the score on the V8 benchmark suite could
be almost doubled if the code generator were as advanced on ARM. The
tricky bit is to speed up the running code without slowing down
compilation, which can be a big factor in page load time on slow
devices.
Looking at raw MHz can be misleading. The Cortex A8 design in the
BeagleBoard is an in-order design, whereas the Cortex A9 ARM chip will
be a "multi-issue superscalar, out-of-order, speculating 8-stage
pipeline" according to ARM's white paper. This can make quite a
difference. The in-order Atom is said by Wikipedia to have half the
performance of the out-of-order low end Celerons with around the same
Mhz.
Apart from the MHz, the speed of the memory subsystem can be very
important. This is partly a property of the CPU core itself, but to a
larger extent a property of the second level cache size and speed as
well as the speed of the external RAM interface. There are many
tradeoffs here in system design to do with cost, space and power use.
It's fair to say that V8 (and browser) performance is very dependent
on the memory subsystem.