@nicoha...@chromium.org: You asked me to change this in https://crrev.com/c//5103510/comment/511ee805_1200da52/, so you have now the honor of reviewing this. 😊
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| Code-Review | +1 |
Great cleanup.
LGTM % nit
template <typename AddPairwiseS, typename AddPairwiseU>nit: It's not super obvious what those arguments are supposed to be. Maybe can you rename those to reflect better that these are the masks? (e.g. `SignedAddMask`/`UnsignedAddMask`) Alternatively we could craft a concept for masks, but it's not necessary (might be a bit of a hassle).
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| Commit-Queue | +2 |
template <typename AddPairwiseS, typename AddPairwiseU>nit: It's not super obvious what those arguments are supposed to be. Maybe can you rename those to reflect better that these are the masks? (e.g. `SignedAddMask`/`UnsignedAddMask`) Alternatively we could craft a concept for masks, but it's not necessary (might be a bit of a hassle).
Renaming done. I don't think concepts will really be useful here, they probably will make it harder to read and I don't think we need the extra type safetc that they offer.
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1 is the latest approved patch-set.
The change was submitted with unreviewed changes in the following files:
```
The name of the file: src/compiler/backend/arm/instruction-selector-arm.cc
Insertions: 5, Deletions: 5.
@@ -3076,32 +3076,32 @@
#undef SIMD_VISIT_UNIMPL_BINOP
#undef UNIMPLEMENTED_SIMD_BINOP_LIST
-template <typename AddPairwiseS, typename AddPairwiseU>
+template <typename SignedAddMask, typename UnsignedAddMask>
bool TryEmitExtAddPairwise(InstructionSelector* selector, OpIndex node,
const Simd128BinopOp& add_op, NeonSize neon_size_s,
NeonSize neon_size_u) {
ArmOperandGenerator g(selector);
const Operation& left = selector->Get(add_op.left());
const Operation& right = selector->Get(add_op.right());
- if (left.Is<AddPairwiseS>() && selector->CanCover(node, add_op.left())) {
+ if (left.Is<SignedAddMask>() && selector->CanCover(node, add_op.left())) {
selector->Emit(kArmVpadal | MiscField::encode(neon_size_s),
g.DefineSameAsFirst(node), g.UseRegister(add_op.right()),
g.UseRegister(left.input(0)));
return true;
}
- if (left.Is<AddPairwiseU>() && selector->CanCover(node, add_op.left())) {
+ if (left.Is<UnsignedAddMask>() && selector->CanCover(node, add_op.left())) {
selector->Emit(kArmVpadal | MiscField::encode(neon_size_u),
g.DefineSameAsFirst(node), g.UseRegister(add_op.right()),
g.UseRegister(left.input(0)));
return true;
}
- if (right.Is<AddPairwiseS>() && selector->CanCover(node, add_op.right())) {
+ if (right.Is<SignedAddMask>() && selector->CanCover(node, add_op.right())) {
selector->Emit(kArmVpadal | MiscField::encode(neon_size_s),
g.DefineSameAsFirst(node), g.UseRegister(add_op.left()),
g.UseRegister(right.input(0)));
return true;
}
- if (right.Is<AddPairwiseU>() && selector->CanCover(node, add_op.right())) {
+ if (right.Is<UnsignedAddMask>() && selector->CanCover(node, add_op.right())) {
selector->Emit(kArmVpadal | MiscField::encode(neon_size_u),
g.DefineSameAsFirst(node), g.UseRegister(add_op.left()),
g.UseRegister(right.input(0)));
```
[compiler][arm] Address TODO replacing macro with template
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