[turboshaft][csa] Support block positioning builtin pgo [v8/v8 : main]

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Chen, Yolanda (Gerrit)

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Mar 2, 2026, 2:47:42 AMMar 2
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Chen, Yolanda voted and added 1 comment

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Nico Hartmann (Gerrit)

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Mar 4, 2026, 9:38:43 AMMar 4
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File src/compiler/backend/block-position.h
Line 10, Patchset 2 (Latest):namespace v8 {
namespace internal {
namespace compiler {
Nico Hartmann . unresolved

nit: `namespace v8::internal::compiler {`

File src/compiler/backend/block-position.cc
Line 7, Patchset 2 (Latest):namespace v8 {
namespace internal {
namespace compiler {
Nico Hartmann . unresolved

nit: `namespace v8::internal::compiler {`

Line 65, Patchset 2 (Latest): std::set<RpoNumber> chain;
Nico Hartmann . unresolved

nit: Maybe rename this to `visited` as well (or `placed_blocks` or something). `Chain` gives a different intuition of what this tracks (to me).

File src/compiler/backend/instruction.h
Line 2082, Patchset 2 (Latest): InstructionBlocks* block_permutation =
zone()->AllocateArray<InstructionBlocks>(1);
new (block_permutation) InstructionBlocks(
static_cast<int>(permutation.size()), nullptr, zone());
Nico Hartmann . unresolved

Is this required? Why not just `zone()->New<InstructionBlocks>(...)`?

Line 2080, Patchset 2 (Latest): void ReorderBlocks(base::Vector<int32_t> permutation) {
Nico Hartmann . unresolved

I feel some of the `CHECK`s in this functions can be turned into `DCHECK`s. You can also leave a TODO to switch this after we get some coverage.

Line 1825, Patchset 2 (Latest):#ifdef BUILTIN_BLOCK_POSITION
Nico Hartmann . unresolved

I would prefer to not duplicate those fields and instead make them generally non-const or is there any disadvantage with that?

(same in a few other places and files)

File src/compiler/turboshaft/instruction-selection-phase.cc
Line 330, Patchset 2 (Latest): if (max_count < min_count * 40) {
Nico Hartmann . unresolved

A comment would be good here. Also if you have some insight on why `40` is the number to go here, mention it. If it's just an arbitrary pick, note that as well. This will help us in the future to decide if we can tweak this number or if there are measurements that back `40` as the best choice.

File src/compiler/turboshaft/pipelines.h
Line 389, Patchset 2 (Latest): RUN_MAYBE_ABORT(BlockPositioningPhase);
Nico Hartmann . unresolved

By running this after register allocation, will this not change life ranges and break register assignment?

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    Chen, Yolanda (Gerrit)

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    Mar 6, 2026, 2:53:45 AMMar 6
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    Chen, Yolanda added 9 comments

    Patchset-level comments
    File-level comment, Patchset 3 (Latest):
    Chen, Yolanda . resolved

    Thanks for the comments. I've uploaded a new patchset to resolve the comments and fixed some debug check failures when enable the profile.

    File src/compiler/backend/block-position.h
    Line 10, Patchset 2:namespace v8 {
    namespace internal {
    namespace compiler {
    Nico Hartmann . resolved

    nit: `namespace v8::internal::compiler {`

    Chen, Yolanda

    Done

    File src/compiler/backend/block-position.cc
    Line 7, Patchset 2:namespace v8 {
    namespace internal {
    namespace compiler {
    Nico Hartmann . resolved

    nit: `namespace v8::internal::compiler {`

    Chen, Yolanda

    Done

    Line 65, Patchset 2: std::set<RpoNumber> chain;
    Nico Hartmann . resolved

    nit: Maybe rename this to `visited` as well (or `placed_blocks` or something). `Chain` gives a different intuition of what this tracks (to me).

    Chen, Yolanda

    Done

    File src/compiler/backend/instruction.h
    Line 2082, Patchset 2: InstructionBlocks* block_permutation =

    zone()->AllocateArray<InstructionBlocks>(1);
    new (block_permutation) InstructionBlocks(
    static_cast<int>(permutation.size()), nullptr, zone());
    Nico Hartmann . resolved

    Is this required? Why not just `zone()->New<InstructionBlocks>(...)`?

    Chen, Yolanda

    I was following InstructionBlocksFor. I tried your suggestion. It also works!

    Line 2080, Patchset 2: void ReorderBlocks(base::Vector<int32_t> permutation) {
    Nico Hartmann . resolved

    I feel some of the `CHECK`s in this functions can be turned into `DCHECK`s. You can also leave a TODO to switch this after we get some coverage.

    Chen, Yolanda

    Done. Do you think we need to create an issue to track this?

    Line 1825, Patchset 2:#ifdef BUILTIN_BLOCK_POSITION
    Nico Hartmann . resolved

    I would prefer to not duplicate those fields and instead make them generally non-const or is there any disadvantage with that?

    (same in a few other places and files)

    Chen, Yolanda

    I was unsure if any unexpected changes to the default pipeline. I tried to build and test with non-const by default, no failures.

    File src/compiler/turboshaft/instruction-selection-phase.cc
    Line 330, Patchset 2: if (max_count < min_count * 40) {
    Nico Hartmann . resolved

    A comment would be good here. Also if you have some insight on why `40` is the number to go here, mention it. If it's just an arbitrary pick, note that as well. This will help us in the future to decide if we can tweak this number or if there are measurements that back `40` as the best choice.

    Chen, Yolanda

    Done

    File src/compiler/turboshaft/pipelines.h
    Line 389, Patchset 2: RUN_MAYBE_ABORT(BlockPositioningPhase);
    Nico Hartmann . resolved

    By running this after register allocation, will this not change life ranges and break register assignment?

    Chen, Yolanda

    This only changes code position, but not the execution order. All registers are assigned and used as before in the original block. The jumps and targets are also unchanged. The live range is only valid after SpecialRPO where back-edges point to loop headers only, but not other blocks. After the new placement, it does not quaranteer linear live range anymore. That's why we need to put the positioning phase after register-allocation.

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      Nico Hartmann (Gerrit)

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      Mar 6, 2026, 4:16:57 AMMar 6
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      Nico Hartmann . resolved

      LGTM, thanks

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      Georgia Kouveli (Gerrit)

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      Mar 6, 2026, 1:09:03 PMMar 6
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      Georgia Kouveli added 2 comments

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      Georgia Kouveli . resolved

      I hope you don't mind a question - I happened to be looking at something related and stumbled upon your CL. :)

      File src/compiler/backend/instruction.h
      Line 2136, Patchset 3 (Latest): cur_block->set_loop_end(
      Georgia Kouveli . unresolved

      Perhaps a silly question, but does the reordering algorithm guarantee that loop bodies would be contiguous and loop_end still makes sense? It's not obvious that it does.

      The loop rotation code in ComputeAssemblyOrder seems to rely on this.

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        Chen, Yolanda (Gerrit)

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        Mar 9, 2026, 4:35:27 AMMar 9
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        Chen, Yolanda added 2 comments

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        File-level comment, Patchset 4 (Latest):
        Chen, Yolanda . resolved

        Hi Nico, I've made some correction on the loop_end update to support the later loop rotation. Please take a look. Thanks!

        File src/compiler/backend/instruction.h
        Line 2136, Patchset 3: cur_block->set_loop_end(
        Georgia Kouveli . resolved

        Perhaps a silly question, but does the reordering algorithm guarantee that loop bodies would be contiguous and loop_end still makes sense? It's not obvious that it does.

        The loop rotation code in ComputeAssemblyOrder seems to rely on this.

        Chen, Yolanda

        Good question! Yes, some of the cold blocks may be moved out of the loop body, this is similar to the deferred blocks. But we still can guranteer contiguous of loop body for the hot blocks using the top-down positioning. Thus loop rotation can be performed after the reordering (ideally we may combine them, but currently we only apply this for builtin pgo). To ensure this, I've updated the code to add some check and update the loop_end to point to one plus the backedge block number instead of direct mapping to the old number.

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          Chen, Yolanda (Gerrit)

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          Mar 10, 2026, 8:24:37 PMMar 10
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          Chen, Yolanda voted Commit-Queue+2

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          V8 LUCI CQ (Gerrit)

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          Mar 10, 2026, 9:36:21 PMMar 10
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          V8 LUCI CQ submitted the change with unreviewed changes

          Unreviewed changes

          3 is the latest approved patch-set.
          The change was submitted with unreviewed changes in the following files:

          ```
          The name of the file: BUILD.gn
          Insertions: 8, Deletions: 0.

          The diff is too large to show. Please review the diff.
          ```
          ```
          The name of the file: src/compiler/turboshaft/instruction-selection-phase.cc
          Insertions: 1, Deletions: 1.

          The diff is too large to show. Please review the diff.
          ```
          ```
          The name of the file: src/compiler/backend/instruction.h
          Insertions: 7, Deletions: 1.

          The diff is too large to show. Please review the diff.
          ```

          Change information

          Commit message:
          [turboshaft][csa] Support block positioning builtin pgo
          Change-Id: I3a79af11ad349929b317c216475408e4f8d634c3
          Reviewed-by: Nico Hartmann <nicoha...@chromium.org>
          Commit-Queue: Chen, Yolanda <yoland...@intel.com>
          Cr-Commit-Position: refs/heads/main@{#105712}
          Files:
          • M BUILD.gn
          • M src/builtins/profile-data-reader.cc
          • M src/builtins/profile-data-reader.h
          • A src/compiler/backend/block-position.cc
          • A src/compiler/backend/block-position.h
          • M src/compiler/backend/instruction.cc
          • M src/compiler/backend/instruction.h
          • M src/compiler/turboshaft/graph.cc
          • M src/compiler/turboshaft/graph.h
          • M src/compiler/turboshaft/instruction-selection-phase.cc
          • M src/compiler/turboshaft/pipelines.h
          • M src/compiler/turboshaft/register-allocation-phase.h
          • M src/logging/runtime-call-stats.h
          • M tools/builtins-pgo/get_hints.py
          Change size: L
          Delta: 14 files changed, 409 insertions(+), 17 deletions(-)
          Branch: refs/heads/main
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          Michael Achenbach (Gerrit)

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