Have Interview Slots:- Validation Engineer-- Palo Alto,CA -- Share me profiles ASAP -- Urgent Requirement

[Sakshi Rawal]

Hi,

My name is Sakshi Rawal and I am working with Alpha Silicon. We are headquartered in Santa Clara, CA serving customers nationwide in the United States. We have the following Job opening..

Position:   Validation Engineer

Location: Palo Alto,CA 

Duration: Long Term Contract

Experience required 6+ Years

JOB DESCRIPTION:-

 

Identified candidate should have deep understanding in one or more of the following IPs

·       ARM A55 based CPU

·       LPDDR4

·       ISP (ARM  C71 based)

·       DSP (Tensilica Q7 based)

·       PCIe Gen4

·       SGMII / XFI (1gig and 10gig ethernet with integrated Switch IP)

·       Slow Speed peripherals (UART, I2C, SPI, eMMC, JTAG, CANFD)

·       TDM

Candidate should also have

• good programming experience in embedded C &
• good understanding of debugging an embedded platform during bring up. (This includes exp of using JTAG/TRACE32 Lauterbachs etc)

 

The typical functions of a post-si validation Engineer are

1.     understand the underlying IP/subsystem that they are going to functionally validate

2.     Create a Validation test plan referring to the Pre-Si verification plan and other documelnts

3.     Write and debug the testcase on a Zebu platform

4.     When Silicon is back execute the test cases on silicon and debug

5.     Projecting coverage stats

The resource should have already gone thru. Bring-up and validation of the IP on silicon and should be familiar with the area that they are going to validate.

 

Thanks and Regards,
www.alphasilicon.com  Camino Real Santa Clara Town Centre Suite 1047, Santa Clara CA-95050	Sakshi Rawal US IT Recruiter US: +1-209-251-2041 Email Id: Saks...@alphasilicon.us