Possible bug in "tl" test on register latch 4

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Jay Jaeger

Sep 2, 2022, 2:57:50 PMSep 2
to UniBone
The error reported is:

Highspeed "moving ones" in register latch 4, stop with ^C.
pass 2 test_register_simple_pattern(2, 4): wrote 0x4, read 0x0
Signal path for bus latch 4, bit 2 (mask 0x04):
  Write: P9.30 -> J10.3 DATOUT_2 -> U26.07 -> U26.06 -> U27.02 -> U27.01 -> C0
  Read : P8.43 <- J17.3 DATIN_2 <- U13.16 <- U13.04 <- U27.03 <- U27.01 <- C0

I believe that chip on the second line should be U25 rather than U13, per the schematic.   As corroboration, I had an unconnected pin 4 on U25, which cured the issue once fixed.

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