3D printed feet for DD11-CK Backplane, and EIS support for Unibone CPU20 emulation

[Frits Jalvingh]

Hi everyone,

I often use my Unibone in a standalone DD11-CK backplane to test Unibus cards. This is a really great way to test things, and to learn how to use them.

Using that backplane means that usually it rests on its wire wrap pins which is scary, so my friend Marc designed a 3D printed food that you can slide on that backplane. With three of those you can safely insert cards without putting pressure on those pins. This is how it looks:

The design was made in Onshape, and can be found here: https://cad.onshape.com/documents/45eea3ef2970c7a5e10d40a9/w/e810bf946213bf85f6356808/e/f6f50b3ae0a2c4b70b405c11

I often use XXDP tests to test hardware, but some tests do not run on the CPU20 emulation present on the Unibone. I found out that this is often caused by that emulation missing the extended instruction set, so I've added support for those instructions to the CPU20 emulation. It can be switched on by some parameters. The branch containing that can be found here:

https://github.com/j-hoppe/QUniBone/pull/10

This version allowed the DELUA XXDP tests to run.

I hope this is useful for someone ;)

[Jay Jaeger]

I created some similar 3D props for my DD11-DK (9 slot) backplane.  I use three of these, and just tape them onto the ends and middle of the backplane with Gorilla tape so they don't fall off when I move the backplane.

https://drive.google.com/drive/folders/1co94r3SUB6UKBYQ_0EMubt049xVFzIm-?usp=sharing

JRJ

[Joerg Hoppe]

Hi Jal,

I often use XXDP tests to test hardware, but some tests do not run on the CPU20 emulation present on the Unibone. I found out that this is often caused by that emulation missing the extended instruction set, so I've added support for those instructions to the CPU20 emulation. It can be switched on by some parameters. The branch containing that can be found here:

https://github.com/j-hoppe/QUniBone/pull/10

This version allowed the DELUA XXDP tests to run.

I hope this is useful for someone ;)

This hits an open "todo": make an enhanced CPU, with EIS and MMU, best be a 11/40 KD11-A, and call it "cpu40".
Would you be able to further work on this?

kind regards,

Joerg

[Frits Jalvingh]

Hi Joerg,

EIS is done in that PR, but as part of cpu20. I understand it would be better to create a "cpu40" instead and put everything in there, but that looked quite hard at the time. I will revisit the code and try to find out how the CPU parts integrate, and how I could add a CPU emulation.

The MMU part would be challenging but interesting. I am not sure how much it would slow down the emulation as now every address access needs to be intercepted and mapped through the MMU code..

Anyway, really interesting project, I will definitely take a look to see how far I can go, but I cannot promise anything.

[Ashlin Inwood]

Interesting enough I am currently writing an 11/40 microcode emulator. Primary to aid me in understanding how my system works. 

As it's running at the microcode level it's incredibly slow, too slow for general usage but it could make a good debug aid. It could in theroy run on the unibone when done, although software probably makes assumptions about the processor speed that would cause issues. 

It's really early days, currently it can only get through 2 or 3 microwords before encountering an unimplemented function. It's probably months away for being done. 

But in general I would like to assist in building an 11/40 emulator in some way. Either testing against a real 11/40 or writing emulation code.

[Frits Jalvingh]

Well, my tentative plan would be to make another "cpu" implementation in the code, and to concentrate on getting it fast, not in emulating the internals of the processor it emulates. I think that would be better done in an FPGA, and I think I do not need to emulate the internals (like the shadow R8..R15 registers) to get a working emulation. But of course I'm very new at these machines (I did write many emulators for simpler processors though) so I might miss to see reasons to do it...

Perhaps it's an idea to have a chat to see what would be wise?

[Joerg Hoppe]

Hi all,

Angelo Ppanehoff, who contributed the 11/05 aka "cpu20", also made a 11/40 CPU.

It seems to be ready all here:

https://github.com/aap/pdp11

but needs to be set aside the "cpu20" as "cpu40" ...

And both really should be renamed to there proper DEC names "KA11" and "KD11-A".

kind regards,

Joerg