Heath HT-11 with QBone memory

[Steven Hirsch]

For some reason the Heath variant of RT-11 refuses to boot when any memory
is being emulated by QBone. I have 4K words of memory on the CPU and
another 4K each on two Heath memory boards. With the QBone installed but
not running anything I'm able to start HT-11 from an RX01 diskette in one
of the H27 drives. But, if I setup QBone to emulate memory (doesn't
matter how much) the boot chugs away a bit and dies with a Trap 13
(Octal).

For another data point: If I boot RT-11 from an emulated disk drive on the
QBone, that OS is able to see the RX devices and use them with no
problems.

What - if anything - is different between QBone memory and the physical
memory that might be causing the trap?



--

[Joerg Hoppe]

Hi Steven,

Hard to tell without knowing anything about your system ... "demo"
output and the M*** numbers of the cards in your backplane?

Some ideas anyhow:

- In all cases the QBone address width must match your CPU's:
demo -aw 16, demo -aw 18,  demo -aw 22 .

- is the system running when you remove your MOS memory ? You must close
the backplane gaps then with continuity cards or rearrange QBone and the
RX controller.

kind regards,

Joerg

[Steven Hirsch]

Fair enough. I gathered more information for you.

Backplane is populated as follows:

Slot 1 & 2: DEC M7264 LSI-11 CPU K-11F w/ 4k word of MOS memory (Bank 0)
Slot 3: Heath H-27 interface module (RX01 clone)
Slot 4: DEC M8043 DLV-11 SLU (console)
Slot 5: Heath 4k word MOS memory (Bank 1)
Slot 6: Heath 4k word MOS memory (Bank 2)
Slot 7 & 8: QBone (when active, emulates 4k word of memory - Bank 3)

Here is the LSI-11 console capture, first with QBone installed and
inactive, then with unsuccessful attempt at boot with QBone emulating
additional 4k words of memory. I'm starting from micro-ODT at power up,
then invoking Heath firmware on H-27 module to bootstrap H-11. Please let
me know if additional information is needed?

----

# With QBone installed, but sitting at command prompt with
# no devices active:

000000
173000G
$dx0
HT-11 H01A-3

WELCOME BACK TO HT-11. BOOTUP 209.00.00

.SET USR NOSWAP

.SET TTY SCOPE

THE PREVIOUS DATE WAS 30-MAR-86

CHANGE?

.ASSIGN DX1=DK


.R PIP
*DK0:/L
30-MAR-86
MONITR.SYS 43 30-MAR-86
TT .SYS 2 30-MAR-86
PP .SYS 2 30-MAR-86
PR .SYS 2 30-MAR-86
LP .SYS 2 30-MAR-86
BOOTUP.SYS 14 30-MAR-86
ODT .OBJ 9 30-MAR-86
SYSMAC.SML 20 30-MAR-86
PIP .SAV 12 30-MAR-86
EDIT .SAV 14 30-MAR-86
LINK .SAV 21 30-MAR-86
ASEMBL.SAV 26 30-MAR-86
CREF .SAV 5 30-MAR-86
EXPAND.SAV 12 30-MAR-86
SRCCOM.SAV 11 30-MAR-86
DUMP .SAV 5 30-MAR-86
LIBR .SAV 15 30-MAR-86
PATCH .SAV 5 30-MAR-86
SAMPLE.MAC 2 30-MAR-86
BASIC .SAV 36 30-MAR-86
BASIC .FIS 35 30-MAR-86
CBASIC.SAV 45 30-MAR-86
DATE .DAT 1 30-MAR-86
LISTNG.BAS 2 30-MAR-86
FILXFR.BAS 7 30-MAR-86
25 FILES, 348 BLOCKS
132 FREE BLOCKS
*^C
.

# With additional 4K of memory emulated by QBone:

000000
@173000G
$dx0
041276
@M000013

----------------------------

Here is console for QBone emulation setup:

---------------------------

Script started on Fri 28 May 2021 03:54:16 PM CEST

root@qbone:~# ./memory.sh -aw 16
iarg1=8, iarg2=15
[15:55:32.065776 Inf APP] Printing verbose output.
demo - QUniBone QBUS test application.
Version DBG v1.5.0, compile Apr 22 2021 20:51:37.
[15:55:32.076051 Inf APP] Registering Non-PRU GPIO pins.
[15:55:32.079694 Inf GPIOS] GPIO0 registers at 44E07000 - 44E07FFF (size = 1000)
[15:55:32.082841 Inf GPIOS] GPIO1 registers at 4804C000 - 4804CFFF (size = 1000)
[15:55:32.086109 Inf GPIOS] GPIO2 registers at 481AC000 - 481ACFFF (size = 1000)
[15:55:32.089597 Inf GPIOS] GPIO3 registers at 481AE000 - 481AEFFF (size = 1000)
[15:55:32.100791 Inf APP] Disable DS8641 drivers.
[15:55:32.104066 Inf APP] Leave SYSBOOT mode.


*** QUniBone QBUS technology demonstrator build Apr 22 2021 21:01:12

tg Test of single non-PRU GPIO pins
tp Test I2C paneldriver
tl Test of IO bus latches
bs Stimulate QBUS bus signals
tm Test Bus Master: access QBUS address range without PDP-11 CPU arbitration
ts Test shared DDR memory = QBUS memory as BUS SLAVE
ti Test Interrupts (needs physical PDP-11 CPU)
d Emulate devices, with PDP-11 CPU arbitration
dc Emulate devices and CPU, PDP-11 must be disabled.
m Full memory slave emulation with DMA bus master functions by PDP-11 CPU.
i Info, help
q Quit

d
[15:55:32.121962 Inf APP] Connecting to PRU.
[15:55:32.123914 Inf DDRMEM] Shared DDR memory: 4194304 bytes available, 4194304 bytes needed.
[15:55:32.124137 Inf DDRMEM] Virtual (ARM Linux-side) address: 0xb5406000
[15:55:32.124273 Inf DDRMEM] Physical (PRU-side) address:9d100000
[15:55:32.124396 Inf DDRMEM] 4194304 bytes of QBone memory allocated
[15:55:32.125390 Inf PRU] Loaded and started PRU code with id = 2
[15:55:32.232611 Inf APP] Registering non-PRU pins.
[15:55:32.235809 Inf GPIOS] GPIO0 registers at 44E07000 - 44E07FFF (size = 1000)
[15:55:32.238650 Inf GPIOS] GPIO1 registers at 4804C000 - 4804CFFF (size = 1000)
[15:55:32.242371 Inf GPIOS] GPIO2 registers at 481AC000 - 481ACFFF (size = 1000)
[15:55:32.245268 Inf GPIOS] GPIO3 registers at 481AE000 - 481AEFFF (size = 1000)
[15:55:32.256692 Inf APP] Disable DS8641 drivers.
[15:55:32.260429 Inf APP] Leave SYSBOOT mode.
[15:55:32.263537 Inf APP] Registering multiplex bus latches, initialized later by PRU code.
[15:55:32.266121 Inf APP] Initializing device register maps.
[15:55:32.279733 Inf QUNAPT] QUNIBUSADAPTER::worker(0) started
[15:55:32.283548 Inf QUNAPT] Trying to set thread realtime priority = 50
[15:55:32.286869 Inf QUNAPT] Scheduling is at RT priority.
[15:55:32.287126 Inf QUNAPT] Thread priority is 50
[15:55:32.299611 Inf pnl] PANEL::worker(0) started
[15:55:32.304456 Inf MSSVR] Trying to set thread realtime priority = 50
[15:55:32.312379 Inf MSSVR] Scheduling is at RT priority.
[15:55:32.312687 Inf MSSVR] Thread priority is 50
[15:55:32.379521 WRN REQ] Slot 16 already used by device rx
[15:55:32.381707 WRN REQ] Slot 16 already used by device rx

*** Test of device parameter interface and states.
QBUS devices are clients to PDP-11 CPU acting asg DMR/IRQ Arbitrator
(CPU active: running or HALTed executing microcode ODT).
CPU is physical or emulated.
Memory access as Bus Master with DMR/DMG/SACK handshake.
No current device selected
NO QBUS memory installed ... device test limited!

m i [<endaddr>] Install (emulate) max QBUS memory, or until by <endaddr>
m f [word] Fill QBUS memory (with 0 or other octal value)
m d Dump QBUS memory to disk
m ll <filename> Load memory content from MACRO-11 listing file (boot loader)
m lp <filename> Load memory content from absolute papertape image
m lp Reload last memory content from file ""
ld List all defined devices
en <dev> Enable a device
dis <dev> Disable device
sd <dev> Select "current device"
e <addr> Examine octal QBUS address.
d <addr> <val> Deposit octal val into QBUS address.
dbg c|s|f Debug log: Clear, Show on console, dump to File.
(file = qunibone.log.csv)
init Pulse QBUS INIT
h <1|0> Set/release QBUS HALT, like front panel toggle switch
pwr Simulate QBUS power cycle (DCOK/POK) like front panel RESTART
q Quit

pwr


<<<
<<< Input: waiting for 3000 milli seconds >>>
<<<
m i 77776

Disable memory emulation, size physical memory ...
Now emulating QBone memory in range 060000..077776 with DDR memory.

*** Test of device parameter interface and states.
QBUS devices are clients to PDP-11 CPU acting asg DMR/IRQ Arbitrator
(CPU active: running or HALTed executing microcode ODT).
CPU is physical or emulated.
Memory access as Bus Master with DMR/DMG/SACK handshake.
No current device selected
QBUS memory emulated from 060000 to 077776.

m i [<endaddr>] Install (emulate) max QBUS memory, or until by <endaddr>
m f [word] Fill QBUS memory (with 0 or other octal value)
m d Dump QBUS memory to disk
m ll <filename> Load memory content from MACRO-11 listing file (boot loader)
m lp <filename> Load memory content from absolute papertape image
m lp Reload last memory content from file ""
ld List all defined devices
en <dev> Enable a device
dis <dev> Disable device
sd <dev> Select "current device"
e <addr> Examine octal QBUS address.
d <addr> <val> Deposit octal val into QBUS address.
dbg c|s|f Debug log: Clear, Show on console, dump to File.
(file = qunibone.log.csv)
init Pulse QBUS INIT
h <1|0> Set/release QBUS HALT, like front panel toggle switch
pwr Simulate QBUS power cycle (DCOK/POK) like front panel RESTART
q Quit

D>>>q

[15:56:56.435289 Inf QUNAPT] QUNIBUSADAPTER::worker(0) terminated.


*** QUniBone QBUS technology demonstrator build Apr 22 2021 21:01:12

tg Test of single non-PRU GPIO pins
tp Test I2C paneldriver
tl Test of IO bus latches
bs Stimulate QBUS bus signals
tm Test Bus Master: access QBUS address range without PDP-11 CPU arbitration
ts Test shared DDR memory = QBUS memory as BUS SLAVE
ti Test Interrupts (needs physical PDP-11 CPU)
d Emulate devices, with PDP-11 CPU arbitration
dc Emulate devices and CPU, PDP-11 must be disabled.
m Full memory slave emulation with DMA bus master functions by PDP-11 CPU.
i Info, help
q Quit

>>>q

root@qbone:~# exit
exit

Script done on Fri 28 May 2021 03:57:01 PM CEST


--

[Paul Birkel]

Steve said:

> Slot 3: Heath H-27 interface module (RX01 clone)

> ...

> Here is the LSI-11 console capture, first with QBone installed and
> inactive, then with unsuccessful attempt at boot with QBone emulating
> additional 4k words of memory. I'm starting from micro-ODT at power up,
> then invoking Heath firmware on H-27 module to bootstrap H-11.

Do you have technical documentation for the H-27? The only useful information that I've seen simply states:

"An interface circuit board, which is installed in the H11 Computer, communicates to the controller circuit board in the floppy disk unit through a 34-conductor flat cable. This interface board handles the communications between the controller circuit board and the H11 bus. In addition, the interface board also has bootstrap, processor diagnostic, and absolute loader programs stored in ROM (read only memory)."

I have a disassembled H-11 of uncertain provenance that was accompanied by one of these modules in a box of others; mostly DEC but there were also a pair of H-11-5 Serial I/O modules. Haven't worked on this collection beyond cleaning up the chassis/etc. I'm missing the top cover but otherwise the interior is "acceptable for age".

Are you certain that it's a RX01 clone (down to the registers/etc.)? I was thinking that the on-board bootstrap and floppy disk format/structure may be non-DEC.

What FDD (OEM, model #) do you have connected to it? Presumably there is a 34-to-50 pin adapter somewhere for 8" FDD, correct?

I'd eventually like to put my H-11 into operation, so I've been following this thread with great interest.

Thank you,
paul

[Steven Hirsch]

On Fri, 28 May 2021, Paul Birkel wrote:

> Steve said:
>
>> Slot 3: Heath H-27 interface module (RX01 clone)
>> ...
>> Here is the LSI-11 console capture, first with QBone installed and
>> inactive, then with unsuccessful attempt at boot with QBone emulating
>> additional 4k words of memory. I'm starting from micro-ODT at power up,
>> then invoking Heath firmware on H-27 module to bootstrap H-11.
>
> Do you have technical documentation for the H-27? The only useful
> information that I've seen simply states:
>
> "An interface circuit board, which is installed in the H11 Computer,
> communicates to the controller circuit board in the floppy disk unit
> through a 34-conductor flat cable. This interface board handles the
> communications between the controller circuit board and the H11 bus. In
> addition, the interface board also has bootstrap, processor diagnostic,
> and absolute loader programs stored in ROM (read only memory)."

I have complete technical documentation for the H-27 system. The
individual who owns the rights to Heath publications has been a massive
PITA about issuing takedown notices, so some of this information has been
hard to come by. Here is a dropbox link to a bunch of Heath documents,
including the H-27:

https://www.dropbox.com/sh/j7qcnqaarbdzq66/AAAqwmwHwA5zNz83ztpVcop7a?dl=0

I just ask that the link not be posted anywhere public - thanks.

> I have a disassembled H-11 of uncertain provenance that was accompanied
> by one of these modules in a box of others; mostly DEC but there were
> also a pair of H-11-5 Serial I/O modules. Haven't worked on this
> collection beyond cleaning up the chassis/etc. I'm missing the top
> cover but otherwise the interior is "acceptable for age".

> Are you certain that it's a RX01 clone (down to the registers/etc.)? I
> was thinking that the on-board bootstrap and floppy disk
> format/structure may be non-DEC.

At the hardware level, yes. The bootstrap ROM is specific to HT-11 and
will not start RT-11. That can be worked around by entering an RX01
bootstrap loader under micro-ODT (I haven't tried this yet, but Dave
McGuire suggests it will work).

> What FDD (OEM, model #) do you have connected to it? Presumably there
> is a 34-to-50 pin adapter somewhere for 8" FDD, correct?

No adapter required - see below.

> I'd eventually like to put my H-11 into operation, so I've been
> following this thread with great interest.

The Heath drive subsystem operates in two modes, selected by a switch on
the front of the drive enclosure. In 'RX01' mode it's a DEC clone and is
recognized by and useable under RT-11 (booted from emulated RL drive). In
'Extended' mode, it can boot Heath HT-11 and offers the ability to
low-level format diskettes. The drive enclosure contains two Memorex SSSD
8" drives, power supply and a Z80 based controller board with WD 1771 FDC
chip. It ties to the interface board via a 34-pin proprietary interface.
The manual explains everything in detail.

It's a real mystery why HT-11 itself is unhappy with the emulated memory.
Not likely to be a bootstrap loader issue since there is a lot of disk
activity (seeking around) on the diskette before the Trap 13 (Octal).
This suggests that it's well past initial boot at the point of failure.

Steve


--

[Joerg Hoppe]

Hi Steven,

thanks for the data. Your setup is good, I'm not sure whats going on.

Whats special to early LSI11s is: memory refresh.
The H-11 system is using QBUS memory refresh cycles by the M7264 CPU.
I could not test well QBone behaviour on refresh cycles, as my M7264
died early.
I also didn't had old RAM card which need CPU refresh over QBUS.

Do your both RAM cards need CPU refresh?
I think a hi-res photo of your M7264 would be helpful, to see how all
the config jumpers are set there.

kind regards,
Joerg

[Steven Hirsch]

On Fri, 28 May 2021, Joerg Hoppe wrote:

> Hi Steven,
>
> thanks for the data. Your setup is good, I'm not sure whats going on.

> Whats special to early LSI11s is: memory refresh. The H-11 system is
> using QBUS memory refresh cycles by the M7264 CPU. I could not test well
> QBone behaviour on refresh cycles, as my M7264 died early. I also didn't
> had old RAM card which need CPU refresh over QBUS.

> Do your both RAM cards need CPU refresh?

I looked closer and both 4k boards use static RAM, so no refresh
requirement. The 16k memory board (not in machine at present) has an
onboard refresh generator, so it looks like nothing on the QBus has a need
for refresh cycles.

> I think a hi-res photo of your M7264 would be helpful, to see how all the
> config jumpers are set there.

If necessary, I'd be glad to. But, I've been over this very carefully and
closed jumpers are:

W2 - Resident memory is bank 0
W11 - Enable on-board memory select
W5 - Initialize to micro-ODT

All other jumpers are open. One of the open jumpers is W4, which enables
processor controlled memory refresh. It's unclear whether that applies to
onboard memory, bus memory or both, but since the Heath configuration
chart shows it as open I left it that way.

Steve

>
> kind regards,
> Joerg
>
>

--

[Joerg Hoppe]

Hi Steven,
....

> I think a hi-res photo of your M7264 would be helpful, to see how all
> the config jumpers are set there.
>
> If necessary, I'd be glad to.  But, I've been over this very carefully
> and closed jumpers are:
>
> W2 - Resident memory is bank 0
> W11 - Enable on-board memory select
> W5 - Initialize to micro-ODT
>
> All other jumpers are open.  One of the open jumpers is W4, which
> enables processor controlled memory refresh.  It's unclear whether
> that applies to onboard memory, bus memory or both, but since the
> Heath configuration chart shows it as open I left it that way.

Hmm, the "refresh" theory seems unlikely now.

You've seen this "Mxxx3" trap, which is documented as "double bus
error": illegal memory adress while pushing data onto stack to handle
another "illegal address" trap. So yes, a memory problem.

My standard "bulldozer" procedure would be now:

- make an logic analyzer trace of QBUS activities. QProbe can trigger
when regular bus traffic stops and only the poll to 1777560 (console
serial) is on the QBUS.

Without LA it'd be this route:

- reduce the system downto CPU, DL11, QBone.
- attach PDP11GUI, do a memory test with and without QBone memory.
Best let QBone first emulate only the 2nd 4k page 20000..377776 occupied
by physical RAM card before.
- if that works, download the ZKMA memory diag via PDP11GUI and run
(start at 200)
- if that works, boot XXDP from emulated RL02 and test again CPU and
mem. (XXDP may need LTC disabled).
- if that works, complete the system  card by card and run XXDP ZKMA again.

kind regards,

Joerg



>
> Steve
>
>>
>> kind regards,
>> Joerg
>>
>>
>

[Paul Birkel]

Thank you! That's a BIG 34-to-50 pin adapter, in the true spirit of the
RX01 :->.

-----Original Message-----
From: Steven Hirsch [mailto:snhi...@gmail.com]
Sent: Friday, May 28, 2021 11:50 AM
To: Paul Birkel
Cc: uni...@googlegroups.com
Subject: RE: [unibone] Heath HT-11 with QBone memory

<snip>

> What FDD (OEM, model #) do you have connected to it? Presumably there
> is a 34-to-50 pin adapter somewhere for 8" FDD, correct?

No adapter required - see below.

> I'd eventually like to put my H-11 into operation, so I've been
> following this thread with great interest.

The Heath drive subsystem operates in two modes, selected by a switch on
the front of the drive enclosure. In 'RX01' mode it's a DEC clone and is
recognized by and useable under RT-11 (booted from emulated RL drive). In
'Extended' mode, it can boot Heath HT-11 and offers the ability to
low-level format diskettes. The drive enclosure contains two Memorex SSSD
8" drives, power supply and a Z80 based controller board with WD 1771 FDC
chip. It ties to the interface board via a 34-pin proprietary interface.
The manual explains everything in detail.

<snip>

Steve
--

[Steven Hirsch]

On Sat, 29 May 2021, Joerg Hoppe wrote:

> Without LA it'd be this route:
>
> - reduce the system downto CPU, DL11, QBone.
> - attach PDP11GUI, do a memory test with and without QBone memory.
> Best let QBone first emulate only the 2nd 4k page 20000..377776 occupied by
> physical RAM card before.

> - if that works, download the ZKMA memory diag via PDP11GUI and run (start at
> 200)

Before diving in with test gear, I thought I try this. Problem is: Where
do I find the ZKMA diagnostic as a stand-alone image? It's present on the
various RL02 images I have, but I'm not clear on how to extract it for use
under PDP11GUI.

> - if that works, boot XXDP from emulated RL02 and test again CPU and mem.
> (XXDP may need LTC disabled).
> - if that works, complete the system  card by card and run XXDP ZKMA again.
>
> kind regards,
>
> Joerg
>
>
>
>>
>> Steve
>>
>>>
>>> kind regards,
>>> Joerg
>>>
>>>
>>
>

--

[Joerg Hoppe]

Hi,

>
>> - if that works, download the ZKMA memory diag via PDP11GUI and run
>> (start at 200)
>
> Before diving in with test gear, I thought I try this.  Problem is:
> Where do I find the ZKMA diagnostic as a stand-alone image? It's
> present on the various RL02 images I have, but I'm not clear on how to
> extract it for use under PDP11GUI.

There's a script zkma.sh and *.cmd and binary on your Sdcard.

The binary is distributed here:

http://files.retrocmp.com/qunibone/10.03_app_demo/5_applications/memory/zkma.ptap

kind regards,

Joerg

[Steven Hirsch]

Thanks! The QBone based test fails immediately with a Trap 013, but with
the QBone out of the picture (physically inserted but idle) I can load the
ptap image from PDP11GUI and it runs fine. Currently on third pass with
banks 0, 1, 2 (CPU + 2 4k cards).

It's starting to look like the Qbone memory emulation may not be playing
nicely with the H-11.



>
> kind regards,
>
> Joerg
>
>

--