"frag" <
ne...@ukrm.co.uk> wrote in message
news:MPG.290cffe2...@www.ukrm.co.uk...
> In article <j7sflb$7lr$
1...@dont-email.me>,
rick...@tiscali.co.uk says...
>>
>> 40+ layer boards (5mm thick) stuffed with BGAs, complimentary pairs,
>
> 40 layers? Fuck, I give up with anything over 5 layers (if the problem
> is burned tracks)
I know it sounds ridiculous - it did to me as well. And while I was
completely confident that if allowed the time I could reduce the layer count
by ten or more, their argument was that it costs as much to produce a 30
layer board as a 40 layer so the only real consideration is time. I couldn't
really argue with that. The problem with these layouts is that they have to
be electrically invisible (the boards are used in chip manufacture). One of
the ways they acheive this is by pairing signal lines as soon as possible
after they leave the ball grid array. If you look at a BGA footprint and
think about how the hell you are going to break out the signals and run them
next to the relevant pairing you'll see why so many layers are required.
> How much does it cost to manufacture a 40 layer board vs. some decent
> routing s/w? Can't see the sense in it.
Cost is no object in this context - if the board is 'correct' it will be
used to facilitate mass manufacture. They use top of the range routing
software. It's rules driven which means that among other things, you can set
the conditions for a particular signal line and the DRC will not allow an
error. The controlled impedance trace widths can change between layers due
to dialectric differences forced by build limitations (ie the layers vary in
thickness). The software can accommodate this so that when you do switch
layers the trace width automatically changes. It's a feckin' miracle :) I
would have loved more time with it.
>> controlled impedances, microvias, buried vias and the occasional discrete
>> component. Some of the individual devices cost £1k+. No consideration
>> though
>> of number of vias or attempts to rationalise the routing - just bung it
>> on
>> and if you get a problem add another layer - the rules driven software
>> makes
>> sure the dots are joined.
>> Reworking would be an extremely technical challenge!
>>
>> That's when I knew I was getting old :(
>
> I don't think you're getting old, I think that place' designers have
> lost it.
I think there is an element of truth in that. When faced with such
complexity, it's not surprising that the designers get lazy - why bother
thinking when you can solve the problem with another layer? Unfortunately
for me, I still contend that vias are undesirable and traces should not
switch layers if at all possible etc. I *like* the challenge of layout
optimisation and simplifying PCB manufacture - but they don't. So I feel
'old'.