Failure to Success: Lemons are for Lemonade
Professor Subramanian Iyer, University of California – Los Angeles
SRC JUMP Task, 2776.055
Moderator: Rama Divakaruni, IBM
Wednesday, May 18th @ 1:00p ET / 12:00p CT / 10:00a PT
Open to all of SRC, so please invite your colleagues.
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WebEx Login Information is below the abstract and bio
ABSTRACT: Technology development roadmaps and efforts are strewn with false starts and dead-ends and very often these important pieces of information are lost to institutional memory as people move on, change assignments and companies or leave the workforce. They say experience is worth it - at any cost - especially bad experiences. In this talk, I will describe a few examples of how such experiences can play a defining role in one’s career and also lead to very useful technology innovations. These events happen at all levels and at different stages of our careers and if used appropriately can have a lasting beneficial impact both on technology and career. I will use a few anecdotal examples from my own personal experience to illustrate these points: how a leak in a furnace led to the development of the TI Salicide process used in CMOS and memory for several generations; how reliability showstoppers can be repurposed for useful applications. Sometimes challenges in one area lead to the rethinking of technology direction and lead to career changes.
BIO: Subramanian S. Iyer (Subu) is a Distinguished Professor and holds the Charles P. Reames Endowed Chair in the Electrical Engineering Department and a joint appointment in the Materials Science and Engineering Department at the University of California at Los Angeles. He is the Director of the Center for Heterogeneous Integration and Performance Scaling (UCLA CHIPS). Prior to that, he was an IBM Fellow. His key technical contributions have been the development of the world’s first SiGe base HBT, Salicide, electrical fuses, embedded DRAM, and 45nm technology node used to make the first generation of truly low-power portable devices as well as the first commercial interposer and 3D integrated products. He also was among the first to commercialize bonded SOI for CMOS applications through a start-up called SiBond LLC. More recently, he has been exploring new packaging paradigms and device innovations that may enable wafer-scale architectures, in-memory analog compute and medical engineering applications. He has published over 300 papers and holds over 75 patents. He has received several outstanding technical achievements and corporate awards at IBM. He is an IEEE Fellow, an APS Fellow, an iMAPS Fellow and a Distinguished Lecturer of the IEEE EDS and EPS, and a member of the Board of Governors of IEEE EPS. He is also a Fellow of the National Academy of Inventors. He is a Distinguished Alumnus of IIT Bombay and received the IEEE Daniel Noble Medal for emerging technologies in 2012 and the 2020 iMAPS Daniel C. Hughes Jr Memorial award and the iMAPS distinguished educator award in 2021.
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Office Address: 58-121 ENG IV
Phone: 310-825-2647 or
Los Angeles, CA 90095-1594
EM: da...@seas.ucla.edu
www.ee.ucla.edu
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