more project advice

[prof....@gmail.com]

* make sure that the bodies of your switch transistors are hooked to
the rails. For the nmos pull-down switches, this is natural, but for
the input and output switches, you might be trying to guess which side
is the source and tie to that. Don't. Tie nmos bodies to ground,
pmos bodies to Vdd. Otherwise, bad things can happen (forward biasing
s/d to well diodes, e.g.).

* for bode plots: item 1 on page 2 of the project assignment says
"bode plot of open loop amplifier with output and feedback
capacitance". The best way to do this is to bias the circuit with
phi1=0, phi2=Vdd, and V- driven with an AC source. This means that
you disconnect V- from the feedback network, and measure the bode plot
from V- through the opamp and through the feedback network back to
what would be V- . That way you're directly measuring the magnitude
and phase of the loop gain, A*f.

* you're allowed to use whatever waveforms (period, rise time, and
fall time) for phi1 and phi2 that you want, but they must be the same
for all simulations, and they must go between 0 and Vdd. I find it
easier to debug with a relatively slow rise/fall time, because then I
can see what's going on better.

ksjp