VLSI T & D MID PAPER
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PAVAN KUMAR .CH
Mar 2, 2011, 3:00:09 AM3/2/11
to TRRCE-10-EMBEDDED
1)a)What is clock skew ? How it is calculated ?
b)Explain how to optimize power for sequential circuits ?
2) Explain floor planning methods for a chip in detail ?
3)Explain how two-phase clock system is designed for
sequential circuits and compare it with single-phase clock
system ?
4)What is routiong ? Explain with some suitable example.How it
is optimized ?
5)Write short notes on:
a)High level synthesis
b)off-chip connections
6)Explain architecture for low power SOC’s and Embedded CPU’s
b)Explain how to optimize power for sequential circuits ?
2) Explain floor planning methods for a chip in detail ?
3)Explain how two-phase clock system is designed for
sequential circuits and compare it with single-phase clock
system ?
4)What is routiong ? Explain with some suitable example.How it
is optimized ?
5)Write short notes on:
a)High level synthesis
b)off-chip connections
6)Explain architecture for low power SOC’s and Embedded CPU’s
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