Using configuration file /etc/trex_cfg.yaml
port limit : not configured
port_bandwidth_gb : 10
if_mask : None
is low-end : 0
stack type : linux_based
thread_per_dual_if : 1
if : 12:00.0, 12:00.1, 12:00.2, 12:00.3, 13:00.0, 13:00.1, 13:00.2, 13:00.3, af:00.0, af:00.1, af:00.2, af:00.3,
enable_zmq_pub : 1
zmq_pub_port : 4500
m_zmq_rpc_port : 4501
memory per 2x10G ports
MBUF_64 : 16380
MBUF_128 : 8190
MBUF_256 : 8190
MBUF_512 : 8190
MBUF_1024 : 8190
MBUF_2048 : 4095
MBUF_4096 : 128
MBUF_9K : 512
TRAFFIC_MBUF_64 : 65520
TRAFFIC_MBUF_128 : 32760
TRAFFIC_MBUF_256 : 8190
TRAFFIC_MBUF_512 : 8190
TRAFFIC_MBUF_1024 : 8190
TRAFFIC_MBUF_2048 : 32760
TRAFFIC_MBUF_4096 : 128
TRAFFIC_MBUF_9K : 512
MBUF_DP_FLOWS : 524288
MBUF_GLOBAL_FLOWS : 5120
master thread : 0
rx thread : 15
dual_if : 0
socket : 0
[ 1 2 3 32 33 34 35 ]
dual_if : 1
socket : 0
[ 4 5 6 7 36 37 38 ]
dual_if : 2
socket : 0
[ 8 9 10 39 40 41 42 ]
dual_if : 3
socket : 0
[ 11 12 13 14 43 44 45 ]
dual_if : 4
socket : 1
[ 16 17 18 19 48 49 50 ]
dual_if : 5
socket : 1
[ 20 21 22 51 52 53 54 ]
CTimerWheelYamlInfo does not exist
flags : 8040f00
write_file : 0
verbose : 7
realtime : 1
flip : 0
cores : 4
single core : 0
flow-flip : 0
no clean close : 0
zmq_publish : 1
vlan mode : 0
client_cfg : 0
mbuf_cache_disable : 0
cfg file :
mac file :
out file :
client cfg file :
duration : 0
factor : 1
mbuf_factor : 1
latency : 0 pkt/sec
zmq_port : 4500
telnet_port : 4501
expected_ports : 12
tw_bucket_usec : 20.000000 usec
tw_buckets : 1024 usec
tw_levels : 3 usec
port : 0 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 1 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 2 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 3 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 4 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 5 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 6 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 7 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 8 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 9 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 10 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 11 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 12 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 13 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 14 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 15 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 16 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 17 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 18 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 19 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 20 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 21 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 22 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 23 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 24 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 25 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 26 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 27 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 28 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 29 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 30 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
port : 31 dst:00:00:00:01:00:00 src:00:00:00:00:00:00
Total Memory :
MBUF_64 : 163800
MBUF_128 : 81900
MBUF_256 : 57330
MBUF_512 : 57330
MBUF_1024 : 57330
MBUF_2048 : 57330
MBUF_4096 : 24576
MBUF_DP_FLOWS : 3145728
MBUF_GLOBAL_FLOWS : 30720
get_each_core_dp_flows : 131072
Total memory : 993.42 Mbytes
core_list : 0,15,1,2,3,4,5,6,7,8,9,10,11,12,13,14,16,17,18,19,20,21,22,32,39,51
sockets : 0 1
active sockets : 2
ports_sockets : 2
0,0,0,0,0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
phy | virt
1 1
2 7
3 13
4 2
5 8
6 14
7 20
8 3
9 9
10 15
11 4
12 10
13 16
14 22
16 5
17 11
18 17
19 23
20 6
21 12
22 18
32 19
39 21
51 24
DPDK args
xx -l 0,15,1,2,3,4,5,6,7,8,9,10,11,12,13,14,16,17,18,19,20,21,22,32,39,51 -n 4 --log-level 8 --master-lcore 0 -w 0000:12:00.0 -w 0000:12:00.1 -w 0000:12:00.2 -w 0000:12:00.3 -w 0000:13:00.0 -w 0000:13:00.1 -w 0000:13:00.2 -w 0000:13:00.3 -w 0000:af:00.0 -w 0000:af:00.1 -w 0000:af:00.2 -w 0000:af:00.3 --legacy-mem
EAL: Detected 64 lcore(s)
EAL: Detected 2 NUMA nodes
EAL: Static memory layout is selected, amount of reserved memory can be adjusted with -m or --socket-mem
EAL: Multi-process socket /var/run/dpdk/rte/mp_socket
EAL: Selected IOVA mode 'PA'
EAL: No available hugepages reported in hugepages-1048576kB
EAL: Probing VFIO support...
EAL: PCI device 0000:12:00.0 on NUMA socket 0
EAL: probe driver: 8086:1572 net_i40e
EAL: PCI device 0000:12:00.1 on NUMA socket 0
EAL: probe driver: 8086:1572 net_i40e
EAL: PCI device 0000:12:00.2 on NUMA socket 0
EAL: probe driver: 8086:1572 net_i40e
EAL: PCI device 0000:12:00.3 on NUMA socket 0
EAL: probe driver: 8086:1572 net_i40e
EAL: PCI device 0000:13:00.0 on NUMA socket 0
EAL: probe driver: 8086:1572 net_i40e
EAL: PCI device 0000:13:00.1 on NUMA socket 0
EAL: probe driver: 8086:1572 net_i40e
EAL: PCI device 0000:13:00.2 on NUMA socket 0
EAL: probe driver: 8086:1572 net_i40e
i40e_dev_sync_phy_type(): Failed to sync phy type: status=-7
EAL: PCI device 0000:13:00.3 on NUMA socket 0
EAL: probe driver: 8086:1572 net_i40e
i40e_dev_sync_phy_type(): Failed to sync phy type: status=-7
EAL: PCI device 0000:af:00.0 on NUMA socket 1
EAL: probe driver: 8086:1572 net_i40e
i40e_dev_sync_phy_type(): Failed to sync phy type: status=-7
EAL: PCI device 0000:af:00.1 on NUMA socket 1
EAL: probe driver: 8086:1572 net_i40e
i40e_dev_sync_phy_type(): Failed to sync phy type: status=-7
EAL: PCI device 0000:af:00.2 on NUMA socket 1
EAL: probe driver: 8086:1572 net_i40e
i40e_dev_sync_phy_type(): Failed to sync phy type: status=-7
EAL: PCI device 0000:af:00.3 on NUMA socket 1
EAL: probe driver: 8086:1572 net_i40e
i40e_dev_sync_phy_type(): Failed to sync phy type: status=-7
input : [12:00.0, 12:00.1, 12:00.2, 12:00.3, 13:00.0, 13:00.1, 13:00.2, 13:00.3, af:00.0, af:00.1, af:00.2, af:00.3]
dpdk : [0000:12:00.0, 0000:12:00.1, 0000:12:00.2, 0000:12:00.3, 0000:13:00.0, 0000:13:00.1, 0000:13:00.2, 0000:13:00.3, 0000:af:00.0, 0000:af:00.1, 0000:af:00.2, 0000:af:00.3]
pci_scan : [0000:12:00.0, 0000:12:00.1, 0000:12:00.2, 0000:12:00.3, 0000:13:00.0, 0000:13:00.1, 0000:13:00.2, 0000:13:00.3, 0000:af:00.0, 0000:af:00.1, 0000:af:00.2, 0000:af:00.3]
map : [ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11]
TRex port mapping
-----------------
TRex vport: 0 dpdk_rte_eth: 0
TRex vport: 1 dpdk_rte_eth: 1
TRex vport: 2 dpdk_rte_eth: 2
TRex vport: 3 dpdk_rte_eth: 3
TRex vport: 4 dpdk_rte_eth: 4
TRex vport: 5 dpdk_rte_eth: 5
TRex vport: 6 dpdk_rte_eth: 6
TRex vport: 7 dpdk_rte_eth: 7
TRex vport: 8 dpdk_rte_eth: 8
TRex vport: 9 dpdk_rte_eth: 9
TRex vport: 10 dpdk_rte_eth: 10
TRex vport: 11 dpdk_rte_eth: 11