Guidance regarding HDMI2USB Issue #32 (HDMI2USB devices as extenders) for GSoC

[Kashyap Mattoo]

Hi!

I am a student at NIT Durgapur in Electronics and Communication Department. I have been working with VHDL and Verilog for nearly a year, working on the boards Spartan 3 and Basys 3 using both Vivado and Xilinx ISE. My recent project at my institute introduced me to interfacing of peripheral devices to an FPGA dev board and work on hardware architectures. I was looking into VGA integration onto an FPGA while I came across this project on the GSoC website.

As I was going through the HDMI2USB Issue #32, to Allow HDMI2USB devices to act as HDMI extenders via GigaBit Ethernet Port and this dissimilarity to the HDMI2Eth firmware, I had a few questions about the way the firmware needs to be implemented.

1. Will the firmware be implemented as a functional block or as an Intellectual Property block in the design?
2. Which method is preferred "over IP " or raw Eth Frames (I've never dealt with Eth Comm, so which will be easier to tackle)?
3. What is the preferred data flow path? Between what two blocks will the converter preferably be sitting?
4. The converter will be coded in python or VHDL/Verilog(I am new to Git and Open Source. So, I'm a bit confused while navigating through the Repository)

The project seems very exciting and I hope I can work on this issue with your guidance and produce a positive output.

Thank You,

Kashyap Mattoo

[Tim 'mithro' Ansell]

Hi Kashyap,

Sorry for the slow response and it is great you are excited about our project.

This architecture diagram might help you better understand how things could work -> https://github.com/timvideos/HDMI2USB-litex-firmware/blob/master/doc/architecture.png

On 8 March 2018 at 08:23, Kashyap Mattoo <mattoo...@gmail.com> wrote:

Hi!

I am a student at NIT Durgapur in Electronics and Communication Department. I have been working with VHDL and Verilog for nearly a year, working on the boards Spartan 3 and Basys 3 using both Vivado and Xilinx ISE. My recent project at my institute introduced me to interfacing of peripheral devices to an FPGA dev board and work on hardware architectures. I was looking into VGA integration onto an FPGA while I came across this project on the GSoC website.

As I was going through the HDMI2USB Issue #32, to Allow HDMI2USB devices to act as HDMI extenders via GigaBit Ethernet Port and this dissimilarity to the HDMI2Eth firmware, I had a few questions about the way the firmware needs to be implemented.

1. Will the firmware be implemented as a functional block or as an Intellectual Property block in the design?

I'm not sure I understand this question. 

1. Which method is preferred "over IP " or raw Eth Frames (I've never dealt with Eth Comm, so which will be easier to tackle)?

UDP over IP

1. What is the preferred data flow path? Between what two blocks will the converter preferably be sitting?

See the diagram I linked. 

1. The converter will be coded in python or VHDL/Verilog(I am new to Git and Open Source. So, I'm a bit confused while navigating through the Repository)

The project will be coded in Migen / LiteX. You can find more info on these tools here -> https://m-labs.hk/migen/index.html

Hope that helps!

Tim 'mithro' Ansell

[Kashyap Mattoo]

Thank You for responding. 
The architecture has two blocks, one is HDMI2Eth and the other HDMI2USB. Since the issue is about using HDMI2USB as extenders using Gigabit Ethernet, is the corresponding Ethernet port and the interface block to be connected to HDMI2USB USB streamer or the JPEG Encoder or rather connected to the USB PHY, to take data input?

Regards

Kashyap Mattoo

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