This is mostly a bug fix release except for one new feature that in the initial stages. VCD AnalogSignals can be displayed and are converted to a timing diagram AnalogSignal. This happens automatically when opening a VCD file as before. See list of fixes and changes below for a little more info.
Fixed Locale settings to english and US. This should override any settings made by the JVM. This Locale is displayed if started from the command line.
Added VCD Analog Signals. Try sine_waves.vcd in example dir. VCD files get converted automatically to timing diagrams so this is the start of AnalogSignal for timing diagrams.
More capabilities will be added in future versions. Recommendations and suggestions welcome from users. Looking for VCD file examples from users to help test this feature.
Started the clean-up of the examples directory. There where many examples from previous versions of the TimingAnalyzer that were not working.
- cnstrnt_err.tim
- cram_read.tim
- pci_bus_master_mem_read.tim
- pci_bus_master_mem_write.tim
- pci_io_read.tim
- pci_io_write.tim
- sine_waves.vcd
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