Large memory on msp430 chips

17 views
Skip to first unread message

L W

unread,
Oct 3, 2023, 8:59:45 AM10/3/23
to TI Launchpad
I guess this is more a note to TI staff that gets on here ...

Guys, figuratively, it seems that when the 430 parts were destined to get more memory it appears that no old-school guys were around.  You see creating an entire new set of instructions was never necessary if you had been informed of the beauty of bank switched memory common to 8-bit industry uProcessor counterparts such as the 6809, 6502, z80 and the 8080.  Cromemco using the Cromix os could have 7 users all on one 4MHz z80 with each users application in a different 48KB memory bank.  The upper 16KB was the os and buffer area.  In the 430 case the non-moveable segment would the upper 16k where the the interrupt service table resides.  Existing addressing already supports this.
The logical change would have been to use R3, no one directly uses it for purpose and who cares what the compiler actually needs on the end processor, to set the page select.  This also frees up R15 normally sanctioned to be used in conjunction with R3.  I say this as I know of no one that's used the code generator function of R3.  It can be realized that the function as intrinsic was implemented in the 430 early life cycle to save rare memory space and get a fractional speed improvement.  Now ???
Please don't mention backward or cross compatibility - A quaint but rather unrealistic concept.  From micros to mainframes I have yet to see any application get moved sideways, or to an up/down graded platform without extensive rework, except if it was written in UCSD Pascal (now redacted).  With embedded and signal processors significant work is required and normally a rewrite happens based on the reasoning to move or port it in the first place.
The linker can place and set the bank switch code to utilise memory any way you need.   Most people never see that the c compiler will push stuff into high memory pretty quick.  The switch overhead is one clock.  Yes it can still work just fine with dma with few alterations as the larger registers already exist and the upper bits become the bank id.

Rework the msp430, using fram but hopefully mram, dump all the bs around and including the extended instructions, all simplifying the code while realizing more speed.  Backtrack the design and make it much better.  Have an old guy on hand.

Enough said.

Reply all
Reply to author
Forward
0 new messages