What is the excepted flow for using a UVM VCs to unit test my RTL DUT?
I have an RTL block that needs to take in APB transactions and pass them through or gate them depending on the PPROT settings.
I want to hookup the APB interface to an already verified UVM APB VC.
I've added all the infrastructure to connect to the dut (interfaces, APB agent, etc.)
I'm building them the standard way using the create function in the build task of the Unit Test Template.
In my unit test I create some transaction and put them in the sequencer of the VC.
However, nothing happens.
It appears that the standard UVM phases aren't called by default.
So do I manuall call run to kick off the UVM phases?
Is there more elagant way of doing this?
It appears that I might be able to just call the activate_component function to kick start the VC.
However, the documentation suggests this is for use in testing a VC not using a VC to test an RTL DUT.