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Senior ASIC Engineer - Bay Area
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Recruit Express
Feb 25, 2001, 3:18:42 PM2/25/01
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Senior ASIC Engineer
We need a Senior ASIC engineer who has 3 to 6 years
ASIC design experience - of which 2 years was spent
implementing blocks defined by the Architect or
PrincipalDesign Engineer.
You should have strong experience with VHDL or
Verilog.
Compensation to $150K base plus super stock options.
U.S. or Canadian citizenship required. California
residents referred.
Find out why we have been successful in attracting
experienced engineers from Fortune 100 companies to
join this company. Send your resume to Howard Frankel
- who will contact you for further exploration of your
career goals and wealth generation.
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