Altium Backdrill

[Florentina Holcombe]

Thepresence of the unneeded stubs at the bottom and top that extend past their last connected layer make the vias appear as low impedance discontinuities. One way engineers overcome the extra capacitance of these vias is to minimize their lengths and therefore reduce their impedance. This is where backdrilling comes in.

The backdrilling process involves using a drill bit slightly larger in diameter than the one used to create the original via hole to remove unneeded conductive stubs. This bit is usually 8 mils over the primary drill size, but many manufacturers can meet tighter specifications.

So how do you ensure your manufacturer has all the information needed for successfully back drilling all the target vias and PTH components on your circuit board? And how do you keep track of the multiple levels of back drilling specifications throughout your design?

David currently serves as a Sr. Technical Marketing Engineer at Altium and is responsible for managing the development of technical marketing materials for all Altium products. He also works closely with our marketing, sales, and customer support teams to define product strategies including branding, positioning, and messaging. David brings over 15 years of experience in the EDA industry to our team, and he holds an MBA from Colorado State University and a B.S. in Electronics Engineering from Devry Technical Institute.

There are various challenges when it comes to PCB design and manufacture, and one of them is retaining signal integrity. When you transmit a signal, the signal received will be subjected to distortion from signal noise, crosstalk, and other undesired effects.

Incorporating design and manufacturing practices limits such effects and increases signal integrity. Via stubs often contribute to a decrease in signal integrity which can be resolved through the use of the back drilling process.

A via stub, a non-functional part of a via, causes significant signal integrity issues in high-speed design. Via stubs result in the reflection of signals from the stub end, and this reflection will interfere with the original signal.

As these holes are back drilled to a predetermined, controlled depth, this type of drilling is also called controlled depth drilling. Ideally, the via stub left after back drilling should be lesser than 10 mil.

Vias are miniature conductive pathways drilled into the PCB to establish electrical connectivity between the different PCB layers. You can read about vias and their significance in the article how PCB vias interconnect circuit board layers.

A via stub is part of a via that is not used for signal transmission. Via stubs reflect signals and cause a number of signal integrity issues, especially in high-speed signals, which you can read about in this article signal integrity and via stubs.

Through-hole technology, which involves through-holes that go completely through the PCB, has been a part of PCB assembly since the 70s and 80s. Even though through-hole technology has been largely replaced by surface mount technology, it is still in use today.

Through-holes can be plated (PTH) or non-plated (NPTH). While PTH serves as a conductive path from one side of the board to another, NPTH is used for mounting purposes of PCB and rarely to mount components on the board.

Let us say you have a through-hole via going from layer 1 through 12 in a 12-layer stack-up. But the via is only meant for the signals from layers 1 to 3. So, a via stub will be created after layer 3 to layer 12, which will create resonance and reflections at very high frequencies.

It will attenuate the signals at the resonant frequency. Back drilling is performed to remove copper plating after layer 3 up to layer 12 to reduce the stub length. The back drill should be bigger than the original hole size to clear out the unwanted copper.

The back drill diameter needs to be slightly larger than the primary drill diameter. The back drill bit size (diameter) is usually 8 mils over the primary drill size, with 10 mils larger preferred.

Trace and plane clearances need to be large enough that the back drilling process does not accidentally drill through traces and planes located adjacent to the back drilled hole. Minimum plane and trace clearances (spacings) of 10 mils are preferred.

Once you decide to back drill, you will need to decide how much residual stub length can remain. The decision will depend on several interrelated factors including the desired signal integrity performance and practical (cost-effective) manufacturing considerations and limitations.

Usually, increasing the number of vias that need to be back-drilled and decreasing the maximum residual stub length will increase the manufacturing costs of the PCB/backplane. Given below is a table that details the signal loss corresponding to a residual stub length.

After that, at the bottom left portion of the screen, select the Back Drill tab. Once you click that, the back drill option is displayed. This is where you will get to add the various back drill parameters.

In the Layer Stack Manager, you can select the First and Last layers from the Properties panel on the left side. Here we are selecting the top layer as the first layer and the fifth layer as the last layer. You can see that the backdrill figure will also change to reflect your selection of the first and last layers.

Back drilling addresses the issues regarding signal integrity and resonance in vias. Hence, manufacturers and designers need to consider the use of back drilling in order to maintain signal integrity in high-speed signal PCBs.

Once the routing is done, we need to check if the back drills have been set properly. To check the same, switch on all layers. You can see that the circumference of the vias is displayed with dual colors.

You can select and view vias according to their properties using the Property option and selecting the required Layer Pair. Here you can see the Drill count is 12, Hole Size is 30 mil, type of plated hole is NPTH, and the drill hole tolerance as well.

A- Minimizing stub length below 10 mil calls for more accuracy in the drill machine, which makes it more challenging. Also, it increases manufacturing costs; hence, it is difficult to reduce stub length. If your manufacturer is using the latest drilling equipment, there is a possibility of achieving 2 to 3-mil stubs. Check with your manufacturer.

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For the past 15 years or so, routing high-speed interfaces handling 5Gbps or higher have become more common in many electrical designs. Transitioning high-frequency signals between layers can greatly affect signal integrity when a portion of plated through-hole (PTH) is left unused, forming an electrical stub. In general, these stubs are a source of impedance discontinuities and signal reflections, which become more critical as data rates increase.

Introducing a backdrill process to a design can sometimes be a nightmare to manage and requires working very closely with your fabrication vendor. The fabrication vendor will remove as much stub as possible on the identified high-speed signals, adjusting features at each backdrill location and verifying copper clearances due to the increased backdrill size to maintain design integrity.

As a previous customer, I was part of the Allegro PCB Designer 15.7 Beta Test Team in late 2005. I was very excited to see/test the new Backdrill solution inside of Allegro. The functionality pushed Allegro to a higher level by allowing designers to identify nets that require Backdrilling and apply several component and pin properties to influence the design analysis to identify backdrill locations. Locations were identified in the Backdrill report, marked by special backdrill figures/legends for documentation and accompanied with manufacturing NCDrill files of backdrill locations for each specific depth. Even with these enhancement there was still a number of manual steps to ensure the design integrity is maintained (supporting multiple padstacks for backdrill locations, manual backdrill keepouts and backdrill size adjustments at the fabricator)

As time went on, it was clear that further enhancements would improve the process by providing functionality to not only analyze design but also adjust features at the backdrill locations along with generation of a complete manufacturing data package to streamline the fabrication process.

Cadence worked with fabricators and customers to fine tune the existing solution to not only remove most of the post-processing steps by the fabricator but also enhance several areas of the tool in support of the backdrill process. As a member of Product Engineering, I was able to influence the functionality based on my own past customer experiences as well as gathering feedback from our customers.

This new enhanced backdrill solution takes all of the guess work and stress associated with introducing Backdrilling in a design. No more increased Non-Recurring Engineering (NRE) charges at the fabricator, no more escalating costs associated with introducing different via and build-up technologies. Lastly a more complete manufacturing data package with backdrill data information contained in IPC-D-356 and IPC-2581 along with full documentation communicating backdrill intent to the fabricator.

Back drilling is a method to remove the via stub from the specific layer of multilayer PCB. Via stub is a non-functional portion of a plated through hole or via barrel which can cause unwanted reflection leading to signal distortion and lower performance. It is recommended that the diameter of the back drill hole be greater than that of the via hole size.

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