Please add your code PRs into HLD PR or dedicated tracking PR
Yanzhao Zhang
Hi team,
When I check the 202205 features, I noticed that some features do not include the code PRs into its HLD PR (if it has HLD) or tracking PR (if no HLD). Would you please help to make sure your code PRs are included either into the HLD PR (if it has HLD) or dedicated tracking PR (if no HLD)?
See SONiC NVGRE Tunnel HLD by vadymhlushko-mlnx · Pull Request #869 · sonic-net/SONiC (github.com) as example for the format.
If no HLD PR, please create one tracking PR and little r me. The goal is that: for each feature included in the release, the code PR should be trackable.
Below table lists the current feature snapshot for your reference.
|
Feature |
Short Description |
Owner Company |
Owner github id |
Reviewer Company |
Reviewer github id |
HLD PR/Tracking PR |
SAI Header (API) Change Needed? |
HLD Review Date |
Test Plan Review ETA |
PR Ready Review ETA |
Test PR Ready Review ETA |
Code PRs |
Status Update |
|
NVGRE/GRE |
NVGRE is a Layer 3 tunneling protocol that utilizes a standard GRE header to encapsulate a Layer 2 packet. |
Nvidia |
Intel/Dell |
kperumalbfn, mickeyspiegel, svshah-intel |
Yes |
Done |
Done |
Done |
|||||
|
System with zero port support |
Allows to bring up system and finish the init flow |
Nvidia |
Juniper/LinkedIn |
No |
Done |
Done |
PRs list tracked in HLD PRs. PRs that still didnt merged:
|
||||||
|
Align crmorch with sai_object_type_get_availability |
Will not require a new SAI API, but vendors will have to implement this API for using this functionality |
Nvidia |
n/a |
No |
Done |
Done |
Done |
||||||
|
Move Nvidia syncd and pmon to Debian11- "Bullseye" |
Nvidia |
n/a |
No |
Done |
04/15 |
||||||||
|
Dynamic policy based hashing (edit flow) |
PBH for NVGRE/VxLAN packets based on inner 5-tuple (IP proto, L4 dst/src port, IPv4/IPv6 dst/src) |
Nvidia |
No |
Done |
Done |
Done |
Done |
Done |
Done |
||||
|
Counter delay via config_db and not via systemd |
Change the 'sleep' mechanism to be event driven and to have the exact time when the switch is ready to enable counters |
Nvidia |
No |
04/15 |
Following the community feedback we will have a different way to handle it and HLD will focus on fastboto flow improvements. HLD will be able for review by 04/15. Community review should be in 04/23 |
||||||||
|
Route Flow counters (based on generic counters) |
Pool of generic counters that can be attached to dynamic entries for a better visibility and debuggability |
Nvidia |
AVIZ Networks cbpe...@aviznetworks.com |
Done |
Done |
Done |
Done |
PRs list tracked in HLD PR. Very low progress on review and some request contradicts the HLD agreement. WIP. |
|||||
|
hostcfgd Redesign | split hostcfgd into multiple services |
Currently hostcfgd is handling a lot of tables and this leads to performance issues. This has lead to many bugs like
https://github.com/Azure/sonic-buildimage/issues/8619. So It is necessary to split hostcfgd into multiple services. |
Nvidia |
AVIZ Networks cbpe...@aviznetworks.com |
No |
N/A |
N/A |
Done |
N/A |
|||||
|
Password Hardening |
a user password is the key credential used in order to verify the user accessing the switch and acts as the first line of defense in regards to securing the switch. The complexity of the password, it's replacement capabilities and change frequency define the security level of the first perimeter of the switch. Therefore - in order to further improve and harden the switch - a secure mechanism is required to enforce PW policies. |
Nvidia |
Microsoft |
No |
Done |
Done |
Done |
https://github.com/Azure/sonic-buildimage/pull/10322
|
|||||
|
Queue statistics based on queue configurations and not max |
Performance optimization to query only relevant queue in MC aware mode (8-15 are unused) |
Nvidia |
Microsoft |
No |
TBD |
Done |
Done |
https://github.com/Azure/sonic-swss/pull/2143 |
Bug fix |
||||
|
Add system date row to ‘show version’ |
Provide a baseline to improve debug flows |
Nvidia |
No |
N/A |
N/A |
Done |
Done |
Done |
|||||
|
Command for showing specific MAC from DB |
how mac –verbose fetches the whole FDB table When we have large table of Mac the respond will take very long time |
Nvidia |
Microsoft |
N/A |
No |
N/A |
Done |
Done |
|||||
|
Extend auto tech support for memory threshold |
Important when debugging production networks |
Nvidia |
No |
Done on 2/22/2022 |
Done |
Done |
PRs list tracked in HLD PR. Very low progress on review |
||||||
|
Add SAI version check to SONiC build system |
SONiC is not designed to work in backward compatibility with older vendor SAI implementations. SAI headers that SONiC's synd daemon is compiled against are taken from OCP SAI repository while the actual libsai.so is taken from sonic-buildimage vendor's directory. This leads to a situation that sometimes SAI in sonic-sairedis repository is updated but vendor SAI in sonic-buildimage is not. |
Nvidia |
Microsoft |
No |
Done |
Done |
https://github.com/Azure/sonic-sairedis/pull/1000 |
||||||
|
Event-mgmt Infra |
Dell |
BRCM(?) |
No |
Reviewed on 04/27/2021, require a reviewer to sign-off |
7/13/2021 - ready for review |
https://github.com/Azure/sonic-buildimage/pull/7813 |
|||||||
|
Klish CLI for show-tech support |
Dell |
BRCM/MSFT |
No |
4/6/2021 |
6/30/2021 |
All PRs are merged |
|||||||
|
Storm Control (BUM) |
BRCM |
MSFT/Innovium |
No |
4/6/2021 |
4/10/2021 |
https://github.com/Azure/sonic-swss/pull/1306 |
4/26: #441 merged, #565 merged, #346 merged |
||||||
|
CMIS Diagnostics |
Introduce the CMIS4 transceiver-specific diagnostic test to help users narrow down the root cause of link failures. Scope of the change:
|
BRCM |
Dell/Nvidia/Google |
No |
Reviewed on 10/5/2021 |
Done |
Done |
N/A |
https://github.com/Azure/sonic-platform-common/pull/219 |
Done |
|||
|
System Ready Enhancements |
Today there is no easy way to know when the device is ready in terms of control/dataplane. The change allows declaration of System ready (Syslog/CLI) when all the services(dockers+host) are up and ready. Also define a framework for each service to declare itself ready based on their application criteria. |
BRCM |
Dell/Nvidia |
No |
Reviewed on 10/5/2021 |
9/29/2021 |
https://github.com/Azure/sonic-buildimage/pull/10479 https://github.com/Azure/sonic-utilities/pull/1851 |
12/2: |
|||||
|
Build Time Improvement |
Combining build time improvement with build reproduceabilty and determinism, collectively as build time improvement HLD (local caching of debian pkg, python pkg, go pkg, docker image, git clone to avoid external download). Combine 20-25% time saving for full compilation |
BRCM |
Nvidia (stepanblyschak) |
|
2/29/2022 |
https://github.com/Azure/sonic-buildimage/pull/10352 (merged) |
4/26: #942 merged |
||||||
|
Link Training |
Link Training is a process by which the transmitter and receiver on a high-speed serial link communicate with each other in order to tune their equalization settings. In theory, link training enables automatic
tuning of the finite impulse response (FIR) filter for each channel in an application-specific integrated circuit (ASIC) to achieve the desired bit error rate (BER).
|
BRCM |
2/8/2022 |
2/7/2022 |
https://github.com/opencomputeproject/SAI/pull/1434 (merged)
|
4/26: #1434 merged |
|||||||
|
Auto Neg Enhancement |
Autonegotiation is a signaling mechanism and procedure used by Ethernet over twisted pair or optical media by which two connected devices choose common transmission parameters, such as speed, duplex mode,
and flow control. |
BRCM |
2/8/2022 |
https://github.com/opencomputeproject/SAI/pull/1474 |
|||||||||
|
SNMPd Enhancements |
Enable ipv6 snmpd support. Generate coldStart/warmStart trap based on reboot reason to differentiate. Removed default SNMP community public for security. Add strerror to SNMP file open failure. There is a possibility for snmpd try to open a device file (for reading statistics) which is already deleted by other applications. |
BRCM |
N/A |
https://github.com/Azure/sonic-py-swsssdk/pull/108 |
|||||||||
|
SONiC fanout support |
Change fanout switch o.s to SONiC. Make sure SONiC has all the CLI needed, then management will be modified |
MSFT |
yxieca |
MSFT |
N/A |
Change fanout switch o.s to SONiC. |
|||||||
|
100% SONiC YANG model |
Build a full and complete YANG model for SONiC configDB |
MSFT |
qiluo-msft |
MSFT |
No |
N/A |
9/30/2021 |
https://github.com/Azure/sonic-buildimage/projects/4 |
|||||
|
Deprecating Python2 from platform daemons
|
All platform daemons will run using Python 3. Python 2 support will be removed. Vendors must build and install Python 3 sonic-platform packages. |
MSFT |
yxieca |
MSFT |
n/a |
No |
N/A |
8/30/2021 |
10/19: |
||||
|
SONiC management repo Python3 compliance |
Python3 support with SONiC management repo |
MSFT |
yxieca |
n/a |
No |
N/A |
|||||||
|
MACSEC enhancement: primary & fallback case |
MACsec can enable primary and fallback Connectivity Association Keys(CAK) at a same time. Meanwhile the primary and fallback key can be switched or replaced without any outage. |
MSFT |
lguohan |
BRCM/Juniper |
No |
Done |
|
||||||
|
Active Active ToRs |
Link manager and warm reboot support for active-active dual ToRs |
MSFT |
yxieca |
No |
4/15/2022 |
warm reboot improvement for dual tor scenario |
|||||||
|
Vxlan enhancement |
Dual ToR with vxlan tunnel |
MSFT |
prsunny |
No |
4/15/2022 |
||||||||
|
BGP config incremental update |
BGP config incremental update |
MSFT |
yxieca |
No |
4/15/2022 |
Defer |
|||||||
|
Symcrypt integration with OpenSSL |
Prepare OpenSSL with Symcrypt engine for FIPS140-3 certification |
MSFT |
lguohan |
Nvidia |
No |
3/22/2022 |
FIP140-3 certification will take about 1-1.5 years, the goal in 202205 is to get the code ready and submit the certification to NIST |
||||||
|
Sorted next hop ECMP |
MSFT |
rlhui |
Nvidia |
No |
11/9/2021 |
||||||||
|
400G ZR support |
MSFT |
lgouhan |
Rita will provide the HLD link, HLD was reviewed before |
||||||||||
|
ACL UDF |
Support user defined fields in ACL. |
MSFT |
yxieca |
Cut from 202205 release and move it to future release |
|||||||||
|
Streaming Telemetry support for Syslog |
Enable streaming telemetry with Syslog |
MSFT |
qiluo-msft |
No |
3/30/2022 |
||||||||
|
DSCP/TC remapping for tunnel traffic |
Bounced-back traffic from standby ToR to T1 will be remapped into another queue to avoid PFC deadlock with dual ToR |
MSFT |
Bing Wang |
Nvidia |
Yes |
3/29/2022 |
-Added on 3/21/2022 |
||||||
|
gNMI interface for config |
MSFT |
qiluo-msft |
No |
3/15/2022 |
|||||||||
|
FRR version update from 7.5 to 8.2 |
Upgrade FRR to latest community version 8.2 |
BRCM |
MSFT |
n/a |
No |
n/a |
4/26: Code PR submitted |
||||||
|
PINS Runtime Configuration |
Enable P4Runtime container in the build and add appropriate schema in Config DB to enable/disable PINS |
|
Intel |
No |
Reviewed |
||||||||
|
PINS test coverage improvement with more test cases |
Add tests in P4RT application, P4Orch and PacketIO |
|
Intel |
No |
Reviewed |
||||||||
|
PINS - Critical State and Enhanced error reporting |
PINS improvement with critical state and enhanced error reporting |
|
Dell/Intel |
Initial HLD is being rewritten to use the APIs provided by "Event-mgmt Infra |
No |
3/30/2022 |
Deferred to future release per update from Google |
||||||
|
PINS - Batched programming requests for higher throughput |
PINS supports batched programming requests for higher throughput via optimized API call |
|
Intel |
No |
Reviewed |
||||||||
|
PINS - Augment PacketIO support |
Augment PINS PacketIO support |
|
Intel |
No |
Reviewed |
||||||||
|
Static Anycast Gateway (SAG) |
Static Anycast Gateway. To provide anycast gateway for host/VMs. Can be used independently, or with MCLAG to provide single gateway for MC-LAG member host. To provide the possibility for host VM mobility. Both IPv4 and v6 |
Edgecore |
Dell/Intel/BRCM |
kperumalbfn, reshmaintel |
No |
Reviewed on 8/24/2021 |
3/18/2022 |
8/20/2021 |
4/8/2022 |
https://github.com/Azure/sonic-buildimage/pull/9018
|
11/16: |
||
|
|
EdgeCore |
TBD |
|||||||||||
|
VLAN Stacking |
This feature provides Q-in-Q and VLAN translation for service providers who carry traffic of multiple customers across their networks and are required to maintain the VLAN and Layer 2 protocol configurations of each customer without impacting the traffic of other customers. |
EdgeCore |
pttch |
Intel |
kperumalbfn, mickeyspiegel |
Yes |
Reviewed on 1/25/2022 |
5/6/2022 |
4/29/2022 |
5/6/2022 |
4/21: Code is under developiong according to the updated HLD with feedback from community. |
||
|
Config Reload Enhancement: Introduce the Transaction Mechanism |
1. Add a mechanism to avoid initiating a new 'config reload' operation when an existing transaction is still active.
|
EdgeCore |
CharlieChenEC |
Nvidia (Junchao-Mellanox) |
|
No |
3/22/2022 |
TBD |
TBD |
TBD |
3/22: HLD is reviewed in community |
||
|
EVPN-MH Phase #1 |
SAI extensions, Linux kernel and libnl patches for EVPN-MH feature |
EdgeCore |
Nvidia |
Yes |
TBD |
N/A |
6/14/2022 |
N/A |
|||||
|
Further extensions and uses of application extension framework |
MetaSwitch |
Nvidia/Microsoft (Renuka) |
out of 202205 plan |
||||||||||
|
MPLS scalability enhancement in SAI and SWSS |
MetaSwitch |
out of 202205 plan |
|||||||||||
|
Global setting to allow IPv6 link-local neighbours to always be programmed |
MetaSwtich |
out of 202205 plan |
|||||||||||
|
Platform support for Edgecore AS4630/AS7326/AS7816/AS5835 |
sonic-buildimage changes needed to support AS4630 switch |
Target |
Edgecore |
N/A |
2/1/2022 |
2/15/2022 |
3/1/2022 |
||||||
|
PINS SAI Extensions |
SAI extensions for PINS feature |
Intel |
|
Yes |
5/18/2022 |
TBD |
TBD |
TBD |
SAi API for PINS SAi Generic Extensions is being discussed in small group community discussions. Once ratified will go to SAI community review. As SAI API is approved, The review for SONiC PINS implementation will be scheduled |
||||
|
PINS SAI.P4 enhancements for Layer2 support and VxLAN |
Intel |
|
N/A |
No |
5/18/2022 |
3/31/2022 |
4/16/2022 |
TBD |
|||||
|
SRv6 policy steering w/ FRR protocols integration |
FRR SRv6 integration into SONiC that enables features like END.X. Needs FRR 8.1 (minimum) or later - dependency |
Cisco, Alibaba, Intel |
Microsoft? |
No |
4/27/2022 |
4/27/2022 |
TBD |
TBD |
|||||
|
SRv6 sBFD |
Intel, Alibaba |
Microsoft? |
No |
TBD |
TBD |
||||||||
|
SRv6 DT46 |
Intel, Alibaba |
Microsoft? |
No |
TBD |
TBD |
||||||||
|
DASH – SAI PTF extension for SmartNIC |
Test harness for DASH to test APIs for both softswitch and hardware |
Intel |
reshmaintel |
Microsoft? |
https://github.com/reshmaintel/DASH/blob/main/doc_SAI-Proposal-SAI-PTF.md |
No |
4/28/2022 |
5/5/2022 |
5/25/2022 |
5/25/2022 |
|||
|
SONiC with P4 DPDK (PNA architecture) – Basic SoftSwitch with DPDK |
SONiC softswitch |
Intel |
Microsoft? |
No |
5/4/2022 |
5/4/2022 |
5/25/2022 |
5/25/2022 |
|||||
|
Deterministic interface Link bring-up |
have determinstic approach for Interface link bring-up sequence and workflows for use-cases around it |
Cisco |
Nvidia(dgsudharsan) |
Reviewed on 1/18/2022 |
|||||||||
|
Migrate Docker images to Debian "Bullseye" |
SONiC docker images run on Bullseye |
n/a |
Community help is required. |
Yours sincerely
Yanzhao Zhang | He/Him | SONiC PM
Email: yanz...@microsoft.com
SONiC is a Linux Foundation project