Zcu102 Msp430

[Hetty Calin]

TheZCU102 board supports PCIe Gen2 x1 by default, however x2 and x4 are possible by modifying some settings in Vivado (for the FSBL), and correctly setting the external GTR switch (see page 86 of the user guide).

For Linux, the GTR switch setting at boot time can be controlled in the device tree. The device tree also needs modifying to remove the DP/SATA/USB3 devices if these are disabled so the PCIe can use their GTR lanes.

The ZCU102 contains a GTR multiplexer external to the Zynq chip, in order to redirect GTR lanes to the appropriate interface. This is controlled using a GPIO expander over I2C, as detailed in the board manual.

However, the Linux device tree entry for the GPIO expander can be used to set its default pin levels for the required GTR lane settings at boot time, by editing the gtr_selX entries of tca6416_u97 in zynqmp-zcu102.dts.

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