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Nowroz,There are many differences between the Intel and AMD micro-architecture, but you are right that a starting point would be to configure the cache configuration to match the system that you would like to model. The next step could be to model the instruction latencies and port interfaces. You will have to create a new core model based on your architecture. Take a look at sniper/common/performance_model/performance_models/core_model/core_model_nehalem.cc for an example, and update the core_model.cc file to enable your new core model. You'll have to think about the level of detail that you experiments require to determine how much of your core that you will need to model, compared to using the current models.McPAT is computing the memory controller energy use. Take a look at their source code for additional details there. We added a basic DRAM I/O energy model and you can see the details of that in the sniper/tools/mcpay.py file.Trevor
On Mar 26, 2013, at 11:09 PM, abdulla...@brown.edu wrote:
Hi,I am trying to use Sniper to model an AMD quad-core processor Athlon II x4. Is there any configuration file provided in Sniper to model such a processor? If I change the nehalem based config file, or gainstown provided with Sniper according to the specifications such as L1/L2 sizes, will it be a good approximate?At the moment, when I run McPat with Sniper with the gainstown and nehalem configuration file, it only gives me power for cores, different blocks in the cores , L1, and L2 cache, and bus power(very minimal). I am wondering what about the power for DDR memory controllers and I/Os? Is the total power provided by McPat consider the power from I/Os and memory controllers?Thanks,Nowroz--
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$SNIPER_ROOT/run-sniper -n 4 -- $SNIPER_ROOT/test/fft/fft -p 4
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Good luck,Trevor
$SNIPER_ROOT/run-sniper -n 4 -c gainestown -g --network/memory_model_1=emesh_hop_by_hop -- $SNIPER_ROOT/test/fft/fft -p 4