Sharing Policy of Branch Predictor and Caches and TLBs

[Abdelrahman S. Hussein]

Hello,

I am trying to investigate the impact of SMT. When I run the following configuration set where (n=2, logical_cores=1) and   (n=2, logical_cores=2). The expectation is that the  interference resulted from the contention of threads on 2 logical cores on 1 core should result in a performance drop in branch predictor and TLBs. However, in most cases of running splash-2 large input size, the SMT may even outperform the 2 logical cores on a core in terms of branch prediction accuracy, TLB miss rate, which may not be a valid conclusion.

So, I hope you would help me with the following questions:

• How is the resource sharing handled in the SniperSim under the ROB model?
  
  
• Is there a specific sharing policy for resources (e.g., static sharing, dynamic sharing, time multiplex, etc.)? Or the simulator just assumes splitting the resources equally among each thread?

Thanks. Looking forward to your precious response.