FPGA hardware acceleration of SMuFiN

[izaak.c...@gmail.com]

Dear SmuFin team,
We are interested in exploring the application of FPGA's to the SMuFiN algorithm to increase performance.
We plan to do this using Maxeler Data Flow Engines to parallelise sections of the algorithm.
https://www.maxeler.com/technology/dataflow-computing/

We wonder if you would kindly offer us help in suggesting which parts of the algorithm would benefit most from acceleration.

For example, one you have identified breakpoint groups, do you need to align sequences to get consensus?
If so, do you use dynamic programming?

Any help you could offer would be a fantastic help!

Kind Regards,
Izaak