Please see updates for this week.
MPW-2 Silicon Testing
Automated testing has been running across multiple parts.
Initial results show 4 of 17 parts are able to be fully configured with most parts able to configure many of the IO.
We are continuing to debug and optimize the test to see if we can improve results.
We have also brought up a second automated test setup and are working through debug to get it running in parallel.
An automated silicon test suite has been developed with over 30 functional tests. Several of these tests have been run for some core functions including memory and computation for the management core.
Many of these tests depend on IO configurations to support the tests and further execution is waiting for completion of the IO characterization testing described earlier.
A temperature forcing station is in place and we are working to bring it online.
Breakout board fabrication and assembly have been delayed and are now expected to be complete on September 22. Breakout boards and parts will begin shipping on Friday September 23, 2022.
Initial samples of the updated main boards are complete and will arrive at Efabless tomorrow (September 20).
The above automation will be implemented into a configuration based on a Nucleo development board in combination with a Caravel hat mounted to it. The Caravel hat will enable users to install different parts for their projects mounted on breakout boards.
Initial samples are being fabricated for testing. Firmware for the configuration uses Micropython on the development board and initial testing has been completed on the Nucleo board talking to a Caravel.
The configuration will allow users to automate testing parts for their own projects to identify the part that will configure all IO required for their project and provide a configuration ‘string’ to be used by their firmware for setting up IO.
Synopsys STA has been run using extraction data from OpenRCX.
Several issues were resolved with libraries and cells to enable execution.
The analysis shows a hold violation in one part of the shift register chain consistent with bench testing, however, additional hold violations were not shown.
Work is continuing to run STA at additional corners.
We are also working to set up Synopsys StarRC to replace the extraction data from OpenRCX.
Synopsys VCS simulations have been run, but we are still working to reproduce the errors observed on the bench.
This includes generating new SDF files using PrimeTime to see if expected delay values can be generated for the suspected paths.
MPW-2 analysis is complete. We have identified the IOs required for each project. The chart below shows the number of projects based on the number of required IO.
The chart above does not include analog IO for projects.
We will be working with project owners to assist them with configuring IOs for their projects when they receive their boards and parts.