Please see updates for this week.
MPW-2 Silicon Testing
Testing continues using IO characterized configuration for parts as we extend functional test coverage CPU stress, openRAM, DFFRAM, IRQ, UART, etc.
We are continuing to build additional test setups that include the updated Caravel board supporting the breakout boards from MPW-2. The additional setups will allow us to run more part testing in parallel.
A sample from each project is being retained by Efabless to be included in the testing.
Caravel Nucleo Hat boards are back and have completed functional test verification.
Testing has confirmed the ability to perform a range of functions from the Nucleo development board required to support automated testing including
updating firmware to Flash through the housekeeping SPI interface
programming voltage levels for both the 1v8 and 3v3 supplies
reading and writing digital values to all Caravel IO pads
supplying a programmable clock frequency to Caravel through a PWM driver from Nucleo
The Nucleo-based kit will be shipped to project owners with preinstalled software to allow users to automatically test parts for their project and identify the ‘string’ required to configure IO.
The updated Caravel Hat boards have been submitted to the board house for fabrication and assembly. We are waiting for the confirmed delivery date but expect it to be a 7 day turnaround which would have boards back to Efabless on Wednesday, October 12.