[SimpleCPU/SimpleCPU] ac8cf2: [TB] Fixed indent

[raulbehl]

Branch: refs/heads/master
Home: https://github.com/SimpleCPU/SimpleCPU
Commit: ac8cf2e4eeac6ff083af3a4af91a574a8a22fc27
https://github.com/SimpleCPU/SimpleCPU/commit/ac8cf2e4eeac6ff083af3a4af91a574a8a22fc27
Author: raulbehl <raul...@gmail.com>
Date: 2017-02-26 (Sun, 26 Feb 2017)

Changed paths:
M mips/mips-single-cycle/testbench/top_tb.sv

Log Message:
-----------
[TB] Fixed indent


Commit: 65c885056f1ea59ca09bf645adf8bbd336fec2a0
https://github.com/SimpleCPU/SimpleCPU/commit/65c885056f1ea59ca09bf645adf8bbd336fec2a0
Author: raulbehl <raul...@gmail.com>
Date: 2017-02-26 (Sun, 26 Feb 2017)

Changed paths:
M mips/mips-pipeline/testbench/top_tb.sv

Log Message:
-----------
[TB] Added pipelined signals

- Tapped RTL signals at various pipe stages
- Qualified all the signals till RET stage


Compare: https://github.com/SimpleCPU/SimpleCPU/compare/8d2dfd3b39ce...65c885056f1e